49 static const char *yesno(int v)  in yesno()  function
88 #define PRINT_FLAG(x)  seq_printf(m, #x ": %s\n", yesno(info->x))  in i915_capabilities()
1390 		   yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));  in vlv_drpc_info()
1392 		   yesno(rpmodectl1 & GEN6_RP_ENABLE));  in vlv_drpc_info()
1394 		   yesno(rpmodectl1 & GEN6_RP_ENABLE));  in vlv_drpc_info()
1396 		   yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==  in vlv_drpc_info()
1399 		   yesno(rcctl1 & (GEN7_RC_CTL_TO_MODE |  in vlv_drpc_info()
1439 		seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));  in gen6_drpc_info()
1455 		   yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));  in gen6_drpc_info()
1457 		   yesno(rpmodectl1 & GEN6_RP_ENABLE));  in gen6_drpc_info()
1459 		   yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==  in gen6_drpc_info()
1462 		   yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));  in gen6_drpc_info()
1464 		   yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));  in gen6_drpc_info()
1466 		   yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));  in gen6_drpc_info()
1468 		   yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));  in gen6_drpc_info()
1492 		   yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));  in gen6_drpc_info()
1643 		   yesno(i915.enable_ips));  in i915_ips_status()
2239 	seq_printf(m, "LLC: %s\n", yesno(HAS_LLC(dev)));  in i915_llc()
2263 	seq_printf(m, "Sink_Support: %s\n", yesno(dev_priv->psr.sink_support));  in i915_edp_psr_status()
2264 	seq_printf(m, "Source_OK: %s\n", yesno(dev_priv->psr.source_ok));  in i915_edp_psr_status()
2265 	seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv->psr.enabled));  in i915_edp_psr_status()
2266 	seq_printf(m, "Active: %s\n", yesno(dev_priv->psr.active));  in i915_edp_psr_status()
2270 		   yesno(work_busy(&dev_priv->psr.work.work)));  in i915_edp_psr_status()
2283 	seq_printf(m, "HW Enabled & Active bit: %s", yesno(enabled));  in i915_edp_psr_status()
2294 		   yesno((bool)dev_priv->psr.link_standby));  in i915_edp_psr_status()
2386 	seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy));  in i915_pc8_status()
2388 		   yesno(!intel_irqs_enabled(dev_priv)));  in i915_pc8_status()
2680 			   yesno(crtc->active), crtc->config->pipe_src_w,  in i915_display_info()
2687 				   yesno(crtc->cursor_base),  in i915_display_info()
2690 				   crtc->cursor_addr, yesno(active));  in i915_display_info()
2694 			   yesno(!crtc->cpu_fifo_underrun_disabled),  in i915_display_info()
2695 			   yesno(!crtc->pch_fifo_underrun_disabled));  in i915_display_info()
2795 			   pll->config.crtc_mask, pll->active, yesno(pll->on));  in i915_shared_dplls_info()
4498 		   yesno(INTEL_INFO(dev)->has_slice_pg));  in i915_sseu_status()
4500 		   yesno(INTEL_INFO(dev)->has_subslice_pg));  in i915_sseu_status()
4502 		   yesno(INTEL_INFO(dev)->has_eu_pg));  in i915_sseu_status()