272 		PSB_WVDC32(0, PP_CONTROL);  in oaktrail_save_display_registers()
279 		PSB_WVDC32(0x58000000, DSPACNTR);  in oaktrail_save_display_registers()
281 		PSB_WVDC32(0, DSPASURF);  in oaktrail_save_display_registers()
287 		PSB_WVDC32(0x0, PIPEACONF);  in oaktrail_save_display_registers()
292 		PSB_WVDC32(0, MRST_DPLL_A);  in oaktrail_save_display_registers()
312 	PSB_WVDC32(regs->psb.saveDSPARB, DSPARB);  in oaktrail_restore_display_registers()
313 	PSB_WVDC32(regs->psb.saveDSPFW1, DSPFW1);  in oaktrail_restore_display_registers()
314 	PSB_WVDC32(regs->psb.saveDSPFW2, DSPFW2);  in oaktrail_restore_display_registers()
315 	PSB_WVDC32(regs->psb.saveDSPFW3, DSPFW3);  in oaktrail_restore_display_registers()
316 	PSB_WVDC32(regs->psb.saveDSPFW4, DSPFW4);  in oaktrail_restore_display_registers()
317 	PSB_WVDC32(regs->psb.saveDSPFW5, DSPFW5);  in oaktrail_restore_display_registers()
318 	PSB_WVDC32(regs->psb.saveDSPFW6, DSPFW6);  in oaktrail_restore_display_registers()
319 	PSB_WVDC32(regs->psb.saveCHICKENBIT, DSPCHICKENBIT);  in oaktrail_restore_display_registers()
322 	PSB_WVDC32(0x80000000, VGACNTRL);  in oaktrail_restore_display_registers()
325 	PSB_WVDC32(p->fp0, MRST_FPA0);  in oaktrail_restore_display_registers()
326 	PSB_WVDC32(p->fp1, MRST_FPA1);  in oaktrail_restore_display_registers()
329 	PSB_WVDC32(p->dpll, MRST_DPLL_A);  in oaktrail_restore_display_registers()
333 	PSB_WVDC32(p->htotal, HTOTAL_A);  in oaktrail_restore_display_registers()
334 	PSB_WVDC32(p->hblank, HBLANK_A);  in oaktrail_restore_display_registers()
335 	PSB_WVDC32(p->hsync, HSYNC_A);  in oaktrail_restore_display_registers()
336 	PSB_WVDC32(p->vtotal, VTOTAL_A);  in oaktrail_restore_display_registers()
337 	PSB_WVDC32(p->vblank, VBLANK_A);  in oaktrail_restore_display_registers()
338 	PSB_WVDC32(p->vsync, VSYNC_A);  in oaktrail_restore_display_registers()
339 	PSB_WVDC32(p->src, PIPEASRC);  in oaktrail_restore_display_registers()
340 	PSB_WVDC32(regs->psb.saveBCLRPAT_A, BCLRPAT_A);  in oaktrail_restore_display_registers()
343 	PSB_WVDC32(regs->psb.savePERF_MODE, MRST_PERF_MODE);  in oaktrail_restore_display_registers()
347 		PSB_WVDC32(p->conf, PIPEACONF);  in oaktrail_restore_display_registers()
350 	PSB_WVDC32(p->linoff, DSPALINOFF);  in oaktrail_restore_display_registers()
351 	PSB_WVDC32(p->stride, DSPASTRIDE);  in oaktrail_restore_display_registers()
352 	PSB_WVDC32(p->tileoff, DSPATILEOFF);  in oaktrail_restore_display_registers()
355 	PSB_WVDC32(p->cntr, DSPACNTR);  in oaktrail_restore_display_registers()
356 	PSB_WVDC32(p->surf, DSPASURF);  in oaktrail_restore_display_registers()
359 	PSB_WVDC32(regs->psb.saveDSPACURSOR_CTRL, CURACNTR);  in oaktrail_restore_display_registers()
360 	PSB_WVDC32(regs->psb.saveDSPACURSOR_POS, CURAPOS);  in oaktrail_restore_display_registers()
361 	PSB_WVDC32(regs->psb.saveDSPACURSOR_BASE, CURABASE);  in oaktrail_restore_display_registers()
365 		PSB_WVDC32(p->palette[i], PALETTE_A + (i << 2));  in oaktrail_restore_display_registers()
371 		PSB_WVDC32(regs->saveBLC_PWM_CTL2, BLC_PWM_CTL2);  in oaktrail_restore_display_registers()
372 		PSB_WVDC32(regs->psb.saveLVDS, LVDS); /*port 61180h*/  in oaktrail_restore_display_registers()
373 		PSB_WVDC32(regs->psb.savePFIT_CONTROL, PFIT_CONTROL);  in oaktrail_restore_display_registers()
374 		PSB_WVDC32(regs->psb.savePFIT_PGM_RATIOS, PFIT_PGM_RATIOS);  in oaktrail_restore_display_registers()
375 		PSB_WVDC32(regs->psb.savePFIT_AUTO_RATIOS, PFIT_AUTO_RATIOS);  in oaktrail_restore_display_registers()
376 		PSB_WVDC32(regs->saveBLC_PWM_CTL, BLC_PWM_CTL);  in oaktrail_restore_display_registers()
377 		PSB_WVDC32(regs->psb.savePP_ON_DELAYS, LVDSPP_ON);  in oaktrail_restore_display_registers()
378 		PSB_WVDC32(regs->psb.savePP_OFF_DELAYS, LVDSPP_OFF);  in oaktrail_restore_display_registers()
379 		PSB_WVDC32(regs->psb.savePP_DIVISOR, PP_CYCLE);  in oaktrail_restore_display_registers()
380 		PSB_WVDC32(regs->psb.savePP_CONTROL, PP_CONTROL);  in oaktrail_restore_display_registers()
394 	PSB_WVDC32(regs->psb.saveOV_OVADD, OV_OVADD);  in oaktrail_restore_display_registers()
395 	PSB_WVDC32(regs->psb.saveOV_OGAMC0, OV_OGAMC0);  in oaktrail_restore_display_registers()
396 	PSB_WVDC32(regs->psb.saveOV_OGAMC1, OV_OGAMC1);  in oaktrail_restore_display_registers()
397 	PSB_WVDC32(regs->psb.saveOV_OGAMC2, OV_OGAMC2);  in oaktrail_restore_display_registers()
398 	PSB_WVDC32(regs->psb.saveOV_OGAMC3, OV_OGAMC3);  in oaktrail_restore_display_registers()
399 	PSB_WVDC32(regs->psb.saveOV_OGAMC4, OV_OGAMC4);  in oaktrail_restore_display_registers()
400 	PSB_WVDC32(regs->psb.saveOV_OGAMC5, OV_OGAMC5);  in oaktrail_restore_display_registers()
403 	PSB_WVDC32(regs->psb.saveHISTOGRAM_INT_CONTROL_REG,  in oaktrail_restore_display_registers()
405 	PSB_WVDC32(regs->psb.saveHISTOGRAM_LOGIC_CONTROL_REG,  in oaktrail_restore_display_registers()
407 	PSB_WVDC32(regs->psb.savePWM_CONTROL_LOGIC, PWM_CONTROL_LOGIC);  in oaktrail_restore_display_registers()