158 static inline void mixer_reg_writemask(struct mixer_resources *res,  in mixer_reg_writemask()  function
261 	mixer_reg_writemask(res, MXR_STATUS, enable ?  in mixer_vsync_set_update()
292 	mixer_reg_writemask(res, MXR_CFG, val, MXR_CFG_SCAN_MASK);  in mixer_cfg_scan()
333 	mixer_reg_writemask(res, MXR_CFG, val, MXR_CFG_RGB_FMT_MASK);  in mixer_cfg_rgb_fmt()
344 		mixer_reg_writemask(res, MXR_CFG, val, MXR_CFG_GRP0_ENABLE);  in mixer_cfg_layer()
347 		mixer_reg_writemask(res, MXR_CFG, val, MXR_CFG_GRP1_ENABLE);  in mixer_cfg_layer()
352 			mixer_reg_writemask(res, MXR_CFG, val,  in mixer_cfg_layer()
356 			mixer_reg_writemask(res, MXR_GRAPHIC_CFG(0), val,  in mixer_cfg_layer()
368 	mixer_reg_writemask(res, MXR_STATUS, ~0, MXR_STATUS_REG_RUN);  in mixer_run()
376 	mixer_reg_writemask(res, MXR_STATUS, 0, MXR_STATUS_REG_RUN);  in mixer_stop()
488 	mixer_reg_writemask(res, MXR_CFG, ~0, MXR_CFG_LAYER_UPDATE);  in mixer_layer_update()
574 	mixer_reg_writemask(res, MXR_GRAPHIC_CFG(win),  in mixer_graph_buffer()
649 	mixer_reg_writemask(res, MXR_CFG, MXR_CFG_DST_HDMI, MXR_CFG_DST_MASK);  in mixer_win_reset()
652 	mixer_reg_writemask(res, MXR_CFG, MXR_CFG_OUT_RGB888, MXR_CFG_OUT_MASK);  in mixer_win_reset()
655 	mixer_reg_writemask(res, MXR_STATUS, MXR_STATUS_16_BURST,  in mixer_win_reset()
699 	mixer_reg_writemask(res, MXR_CFG, 0, MXR_CFG_GRP0_ENABLE);  in mixer_win_reset()
700 	mixer_reg_writemask(res, MXR_CFG, 0, MXR_CFG_GRP1_ENABLE);  in mixer_win_reset()
702 		mixer_reg_writemask(res, MXR_CFG, 0, MXR_CFG_VP_ENABLE);  in mixer_win_reset()
908 	mixer_reg_writemask(res, MXR_INT_EN, MXR_INT_EN_VSYNC,  in mixer_enable_vblank()
920 	mixer_reg_writemask(res, MXR_INT_EN, 0, MXR_INT_EN_VSYNC);  in mixer_disable_vblank()
1056 	mixer_reg_writemask(res, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET);  in mixer_poweron()