662 static int gsc_src_set_buf_seq(struct gsc_context *ctx, u32 buf_id,  in gsc_src_set_buf_seq()  argument
668 	u32 mask = 0x00000001 << buf_id;  in gsc_src_set_buf_seq()
670 	DRM_DEBUG_KMS("buf_id[%d]buf_type[%d]\n", buf_id, buf_type);  in gsc_src_set_buf_seq()
689 	cfg |= masked << buf_id;  in gsc_src_set_buf_seq()
698 		struct drm_exynos_ipp_buf_info *buf_info, u32 buf_id,  in gsc_src_set_addr()  argument
714 		property->prop_id, buf_id, buf_type);  in gsc_src_set_addr()
716 	if (buf_id > GSC_MAX_SRC) {  in gsc_src_set_addr()
717 		dev_info(ippdrv->dev, "inavlid buf_id %d.\n", buf_id);  in gsc_src_set_addr()
725 			GSC_IN_BASE_ADDR_Y(buf_id));  in gsc_src_set_addr()
727 			GSC_IN_BASE_ADDR_CB(buf_id));  in gsc_src_set_addr()
729 			GSC_IN_BASE_ADDR_CR(buf_id));  in gsc_src_set_addr()
732 		gsc_write(0x0, GSC_IN_BASE_ADDR_Y(buf_id));  in gsc_src_set_addr()
733 		gsc_write(0x0, GSC_IN_BASE_ADDR_CB(buf_id));  in gsc_src_set_addr()
734 		gsc_write(0x0, GSC_IN_BASE_ADDR_CR(buf_id));  in gsc_src_set_addr()
741 	return gsc_src_set_buf_seq(ctx, buf_id, buf_type);  in gsc_src_set_addr()
1094 static int gsc_dst_set_buf_seq(struct gsc_context *ctx, u32 buf_id,  in gsc_dst_set_buf_seq()  argument
1100 	u32 mask = 0x00000001 << buf_id;  in gsc_dst_set_buf_seq()
1103 	DRM_DEBUG_KMS("buf_id[%d]buf_type[%d]\n", buf_id, buf_type);  in gsc_dst_set_buf_seq()
1125 	cfg |= masked << buf_id;  in gsc_dst_set_buf_seq()
1146 		struct drm_exynos_ipp_buf_info *buf_info, u32 buf_id,  in gsc_dst_set_addr()  argument
1162 		property->prop_id, buf_id, buf_type);  in gsc_dst_set_addr()
1164 	if (buf_id > GSC_MAX_DST) {  in gsc_dst_set_addr()
1165 		dev_info(ippdrv->dev, "inavlid buf_id %d.\n", buf_id);  in gsc_dst_set_addr()
1173 			GSC_OUT_BASE_ADDR_Y(buf_id));  in gsc_dst_set_addr()
1175 			GSC_OUT_BASE_ADDR_CB(buf_id));  in gsc_dst_set_addr()
1177 			GSC_OUT_BASE_ADDR_CR(buf_id));  in gsc_dst_set_addr()
1180 		gsc_write(0x0, GSC_OUT_BASE_ADDR_Y(buf_id));  in gsc_dst_set_addr()
1181 		gsc_write(0x0, GSC_OUT_BASE_ADDR_CB(buf_id));  in gsc_dst_set_addr()
1182 		gsc_write(0x0, GSC_OUT_BASE_ADDR_CR(buf_id));  in gsc_dst_set_addr()
1189 	return gsc_dst_set_buf_seq(ctx, buf_id, buf_type);  in gsc_dst_set_addr()
1217 	u32 buf_id = GSC_MAX_SRC;  in gsc_get_src_buf_index()  local
1227 			buf_id = i;  in gsc_get_src_buf_index()
1232 	if (buf_id == GSC_MAX_SRC) {  in gsc_get_src_buf_index()
1237 	ret = gsc_src_set_buf_seq(ctx, buf_id, IPP_BUF_DEQUEUE);  in gsc_get_src_buf_index()
1244 		curr_index, buf_id);  in gsc_get_src_buf_index()
1246 	return buf_id;  in gsc_get_src_buf_index()
1252 	u32 buf_id = GSC_MAX_DST;  in gsc_get_dst_buf_index()  local
1262 			buf_id = i;  in gsc_get_dst_buf_index()
1267 	if (buf_id == GSC_MAX_DST) {  in gsc_get_dst_buf_index()
1272 	ret = gsc_dst_set_buf_seq(ctx, buf_id, IPP_BUF_DEQUEUE);  in gsc_get_dst_buf_index()
1279 		curr_index, buf_id);  in gsc_get_dst_buf_index()
1281 	return buf_id;  in gsc_get_dst_buf_index()
1292 	int buf_id[EXYNOS_DRM_OPS_MAX];  in gsc_irq_handler()  local
1307 		buf_id[EXYNOS_DRM_OPS_SRC] = gsc_get_src_buf_index(ctx);  in gsc_irq_handler()
1308 		if (buf_id[EXYNOS_DRM_OPS_SRC] < 0)  in gsc_irq_handler()
1311 		buf_id[EXYNOS_DRM_OPS_DST] = gsc_get_dst_buf_index(ctx);  in gsc_irq_handler()
1312 		if (buf_id[EXYNOS_DRM_OPS_DST] < 0)  in gsc_irq_handler()
1316 			buf_id[EXYNOS_DRM_OPS_SRC], buf_id[EXYNOS_DRM_OPS_DST]);  in gsc_irq_handler()
1319 		event_work->buf_id[EXYNOS_DRM_OPS_SRC] =  in gsc_irq_handler()
1320 			buf_id[EXYNOS_DRM_OPS_SRC];  in gsc_irq_handler()
1321 		event_work->buf_id[EXYNOS_DRM_OPS_DST] =  in gsc_irq_handler()
1322 			buf_id[EXYNOS_DRM_OPS_DST];  in gsc_irq_handler()