Lines Matching refs:ast
38 struct ast_private *ast = dev->dev_private; in ast_enable_vga() local
40 ast_io_write8(ast, AST_IO_VGA_ENABLE_PORT, 0x01); in ast_enable_vga()
41 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, 0x01); in ast_enable_vga()
46 struct ast_private *ast = dev->dev_private; in ast_enable_mmio() local
48 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04); in ast_enable_mmio()
54 struct ast_private *ast = dev->dev_private; in ast_is_vga_enabled() local
57 if (ast->chip == AST1180) { in ast_is_vga_enabled()
60 ch = ast_io_read8(ast, AST_IO_VGA_ENABLE_PORT); in ast_is_vga_enabled()
62 ast_open_key(ast); in ast_is_vga_enabled()
63 ch = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff); in ast_is_vga_enabled()
77 struct ast_private *ast = dev->dev_private; in ast_set_def_ext_reg() local
83 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, 0x00); in ast_set_def_ext_reg()
85 if (ast->chip == AST2300 || ast->chip == AST2400) { in ast_set_def_ext_reg()
95 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, index, 0x00, *ext_reg_info); in ast_set_def_ext_reg()
104 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x8c, 0x00, 0x01); in ast_set_def_ext_reg()
105 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x00, 0x00); in ast_set_def_ext_reg()
109 if (ast->chip == AST2300 || ast->chip == AST2400) in ast_set_def_ext_reg()
111 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff, reg); in ast_set_def_ext_reg()
114 u32 ast_mindwm(struct ast_private *ast, u32 r) in ast_mindwm() argument
118 ast_write32(ast, 0xf004, r & 0xffff0000); in ast_mindwm()
119 ast_write32(ast, 0xf000, 0x1); in ast_mindwm()
122 data = ast_read32(ast, 0xf004) & 0xffff0000; in ast_mindwm()
124 return ast_read32(ast, 0x10000 + (r & 0x0000ffff)); in ast_mindwm()
127 void ast_moutdwm(struct ast_private *ast, u32 r, u32 v) in ast_moutdwm() argument
130 ast_write32(ast, 0xf004, r & 0xffff0000); in ast_moutdwm()
131 ast_write32(ast, 0xf000, 0x1); in ast_moutdwm()
133 data = ast_read32(ast, 0xf004) & 0xffff0000; in ast_moutdwm()
135 ast_write32(ast, 0x10000 + (r & 0x0000ffff), v); in ast_moutdwm()
166 static u32 mmctestburst2_ast2150(struct ast_private *ast, u32 datagen) in mmctestburst2_ast2150() argument
170 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
171 ast_moutdwm(ast, 0x1e6e0070, 0x00000001 | (datagen << 3)); in mmctestburst2_ast2150()
174 data = ast_mindwm(ast, 0x1e6e0070) & 0x40; in mmctestburst2_ast2150()
176 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
180 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
181 ast_moutdwm(ast, 0x1e6e0070, 0x00000003 | (datagen << 3)); in mmctestburst2_ast2150()
184 data = ast_mindwm(ast, 0x1e6e0070) & 0x40; in mmctestburst2_ast2150()
186 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
190 data = (ast_mindwm(ast, 0x1e6e0070) & 0x80) >> 7; in mmctestburst2_ast2150()
191 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
196 static u32 mmctestsingle2_ast2150(struct ast_private *ast, u32 datagen)
200 ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
201 ast_moutdwm(ast, 0x1e6e0070, 0x00000005 | (datagen << 3));
204 data = ast_mindwm(ast, 0x1e6e0070) & 0x40;
206 ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
210 data = (ast_mindwm(ast, 0x1e6e0070) & 0x80) >> 7;
211 ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
216 static int cbrtest_ast2150(struct ast_private *ast) in cbrtest_ast2150() argument
221 if (mmctestburst2_ast2150(ast, i)) in cbrtest_ast2150()
226 static int cbrscan_ast2150(struct ast_private *ast, int busw) in cbrscan_ast2150() argument
231 ast_moutdwm(ast, 0x1e6e007c, pattern_AST2150[patcnt]); in cbrscan_ast2150()
233 if (cbrtest_ast2150(ast)) in cbrscan_ast2150()
243 static void cbrdlli_ast2150(struct ast_private *ast, int busw) in cbrdlli_ast2150() argument
253 ast_moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24)); in cbrdlli_ast2150()
254 data = cbrscan_ast2150(ast, busw); in cbrdlli_ast2150()
270 ast_moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24)); in cbrdlli_ast2150()
277 struct ast_private *ast = dev->dev_private; in ast_init_dram_reg() local
282 j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_init_dram_reg()
285 if (ast->chip == AST2000) { in ast_init_dram_reg()
287 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_init_dram_reg()
288 ast_write32(ast, 0xf000, 0x1); in ast_init_dram_reg()
289 ast_write32(ast, 0x10100, 0xa8); in ast_init_dram_reg()
293 } while (ast_read32(ast, 0x10100) != 0xa8); in ast_init_dram_reg()
295 if (ast->chip == AST2100 || ast->chip == 2200) in ast_init_dram_reg()
300 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_init_dram_reg()
301 ast_write32(ast, 0xf000, 0x1); in ast_init_dram_reg()
302 ast_write32(ast, 0x12000, 0x1688A8A8); in ast_init_dram_reg()
305 } while (ast_read32(ast, 0x12000) != 0x01); in ast_init_dram_reg()
307 ast_write32(ast, 0x10000, 0xfc600309); in ast_init_dram_reg()
310 } while (ast_read32(ast, 0x10000) != 0x01); in ast_init_dram_reg()
317 } else if (dram_reg_info->index == 0x4 && ast->chip != AST2000) { in ast_init_dram_reg()
319 if (ast->dram_type == AST_DRAM_1Gx16) in ast_init_dram_reg()
321 else if (ast->dram_type == AST_DRAM_1Gx32) in ast_init_dram_reg()
324 temp = ast_read32(ast, 0x12070); in ast_init_dram_reg()
327 ast_write32(ast, 0x10000 + dram_reg_info->index, data | temp); in ast_init_dram_reg()
329 ast_write32(ast, 0x10000 + dram_reg_info->index, dram_reg_info->data); in ast_init_dram_reg()
334 data = ast_read32(ast, 0x10120); in ast_init_dram_reg()
336 data = ast_read32(ast, 0x10004); in ast_init_dram_reg()
338 cbrdlli_ast2150(ast, 16); /* 16 bits */ in ast_init_dram_reg()
340 cbrdlli_ast2150(ast, 32); /* 32 bits */ in ast_init_dram_reg()
343 switch (ast->chip) { in ast_init_dram_reg()
345 temp = ast_read32(ast, 0x10140); in ast_init_dram_reg()
346 ast_write32(ast, 0x10140, temp | 0x40); in ast_init_dram_reg()
352 temp = ast_read32(ast, 0x1200c); in ast_init_dram_reg()
353 ast_write32(ast, 0x1200c, temp & 0xfffffffd); in ast_init_dram_reg()
354 temp = ast_read32(ast, 0x12040); in ast_init_dram_reg()
355 ast_write32(ast, 0x12040, temp | 0x40); in ast_init_dram_reg()
364 j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_init_dram_reg()
371 struct ast_private *ast = dev->dev_private; in ast_post_gpu() local
373 pci_read_config_dword(ast->dev->pdev, 0x04, ®); in ast_post_gpu()
375 pci_write_config_dword(ast->dev->pdev, 0x04, reg); in ast_post_gpu()
379 ast_open_key(ast); in ast_post_gpu()
382 if (ast->chip == AST2300 || ast->chip == AST2400) in ast_post_gpu()
443 static int mmc_test_burst(struct ast_private *ast, u32 datagen) in mmc_test_burst() argument
447 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test_burst()
448 ast_moutdwm(ast, 0x1e6e0070, 0x000000c1 | (datagen << 3)); in mmc_test_burst()
451 data = ast_mindwm(ast, 0x1e6e0070) & 0x3000; in mmc_test_burst()
456 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test_burst()
460 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test_burst()
464 static int mmc_test_burst2(struct ast_private *ast, u32 datagen) in mmc_test_burst2() argument
468 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test_burst2()
469 ast_moutdwm(ast, 0x1e6e0070, 0x00000041 | (datagen << 3)); in mmc_test_burst2()
472 data = ast_mindwm(ast, 0x1e6e0070) & 0x1000; in mmc_test_burst2()
474 ast_moutdwm(ast, 0x1e6e0070, 0x0); in mmc_test_burst2()
478 data = ast_mindwm(ast, 0x1e6e0078); in mmc_test_burst2()
480 ast_moutdwm(ast, 0x1e6e0070, 0x0); in mmc_test_burst2()
484 static int mmc_test_single(struct ast_private *ast, u32 datagen) in mmc_test_single() argument
488 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test_single()
489 ast_moutdwm(ast, 0x1e6e0070, 0x000000c5 | (datagen << 3)); in mmc_test_single()
492 data = ast_mindwm(ast, 0x1e6e0070) & 0x3000; in mmc_test_single()
496 ast_moutdwm(ast, 0x1e6e0070, 0x0); in mmc_test_single()
500 ast_moutdwm(ast, 0x1e6e0070, 0x0); in mmc_test_single()
504 static int mmc_test_single2(struct ast_private *ast, u32 datagen) in mmc_test_single2() argument
508 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test_single2()
509 ast_moutdwm(ast, 0x1e6e0070, 0x00000005 | (datagen << 3)); in mmc_test_single2()
512 data = ast_mindwm(ast, 0x1e6e0070) & 0x1000; in mmc_test_single2()
514 ast_moutdwm(ast, 0x1e6e0070, 0x0); in mmc_test_single2()
518 data = ast_mindwm(ast, 0x1e6e0078); in mmc_test_single2()
520 ast_moutdwm(ast, 0x1e6e0070, 0x0); in mmc_test_single2()
524 static int cbr_test(struct ast_private *ast) in cbr_test() argument
528 data = mmc_test_single2(ast, 0); in cbr_test()
532 data = mmc_test_burst2(ast, i); in cbr_test()
543 static int cbr_scan(struct ast_private *ast) in cbr_scan() argument
549 ast_moutdwm(ast, 0x1e6e007c, pattern[patcnt]); in cbr_scan()
551 if ((data = cbr_test(ast)) != 0) { in cbr_scan()
564 static u32 cbr_test2(struct ast_private *ast) in cbr_test2() argument
568 data = mmc_test_burst2(ast, 0); in cbr_test2()
571 data |= mmc_test_single2(ast, 0); in cbr_test2()
578 static u32 cbr_scan2(struct ast_private *ast) in cbr_scan2() argument
584 ast_moutdwm(ast, 0x1e6e007c, pattern[patcnt]); in cbr_scan2()
586 if ((data = cbr_test2(ast)) != 0) { in cbr_scan2()
599 static u32 cbr_test3(struct ast_private *ast) in cbr_test3() argument
601 if (!mmc_test_burst(ast, 0)) in cbr_test3()
603 if (!mmc_test_single(ast, 0)) in cbr_test3()
608 static u32 cbr_scan3(struct ast_private *ast) in cbr_scan3() argument
613 ast_moutdwm(ast, 0x1e6e007c, pattern[patcnt]); in cbr_scan3()
615 if (cbr_test3(ast)) in cbr_scan3()
624 static bool finetuneDQI_L(struct ast_private *ast, struct ast2300_dram_param *param) in finetuneDQI_L() argument
635 ast_moutdwm(ast, 0x1E6E0068, 0x00001400 | (dlli << 16) | (dlli << 24)); in finetuneDQI_L()
636 ast_moutdwm(ast, 0x1E6E0074, CBR_SIZE1); in finetuneDQI_L()
637 data = cbr_scan2(ast); in finetuneDQI_L()
694 ast_moutdwm(ast, 0x1E6E0080, data); in finetuneDQI_L()
719 ast_moutdwm(ast, 0x1E6E0084, data); in finetuneDQI_L()
723 static void finetuneDQSI(struct ast_private *ast) in finetuneDQSI() argument
732 reg_mcr0c = ast_mindwm(ast, 0x1E6E000C); in finetuneDQSI()
733 reg_mcr18 = ast_mindwm(ast, 0x1E6E0018); in finetuneDQSI()
735 ast_moutdwm(ast, 0x1E6E0018, reg_mcr18); in finetuneDQSI()
750 ast_moutdwm(ast, 0x1E6E000C, 0); in finetuneDQSI()
751 ast_moutdwm(ast, 0x1E6E0018, reg_mcr18 | (dqidly << 16) | (dqsip << 23)); in finetuneDQSI()
752 ast_moutdwm(ast, 0x1E6E000C, reg_mcr0c); in finetuneDQSI()
754 ast_moutdwm(ast, 0x1E6E0068, 0x00001300 | (dlli << 16) | (dlli << 24)); in finetuneDQSI()
755 ast_moutdwm(ast, 0x1E6E0070, 0); in finetuneDQSI()
756 ast_moutdwm(ast, 0x1E6E0074, CBR_SIZE0); in finetuneDQSI()
757 if (cbr_scan3(ast)) { in finetuneDQSI()
810 ast_moutdwm(ast, 0x1E6E0018, reg_mcr18); in finetuneDQSI()
813 static bool cbr_dll2(struct ast_private *ast, struct ast2300_dram_param *param) in cbr_dll2() argument
818 finetuneDQSI(ast); in cbr_dll2()
819 if (finetuneDQI_L(ast, param) == false) in cbr_dll2()
827 ast_moutdwm(ast, 0x1E6E0068, 0x00001300 | (dlli << 16) | (dlli << 24)); in cbr_dll2()
828 ast_moutdwm(ast, 0x1E6E0074, CBR_SIZE2); in cbr_dll2()
829 data = cbr_scan(ast); in cbr_dll2()
865 ast_moutdwm(ast, 0x1E6E0068, ast_mindwm(ast, 0x1E720058) | (dlli << 16)); in cbr_dll2()
869 static void get_ddr3_info(struct ast_private *ast, struct ast2300_dram_param *param) in get_ddr3_info() argument
873 ast_moutdwm(ast, 0x1E6E2000, 0x1688A8A8); in get_ddr3_info()
876 trap = (ast_mindwm(ast, 0x1E6E2070) >> 25) & 0x3; in get_ddr3_info()
890 ast_moutdwm(ast, 0x1E6E2020, 0x0190); in get_ddr3_info()
918 ast_moutdwm(ast, 0x1E6E2020, 0x03F1); in get_ddr3_info()
948 ast_moutdwm(ast, 0x1E6E2020, 0x01F0); in get_ddr3_info()
978 ast_moutdwm(ast, 0x1E6E2020, 0x0230); in get_ddr3_info()
992 ast_moutdwm(ast, 0x1E6E2020, 0x0270); in get_ddr3_info()
1006 ast_moutdwm(ast, 0x1E6E2020, 0x0290); in get_ddr3_info()
1022 ast_moutdwm(ast, 0x1E6E2020, 0x0140); in get_ddr3_info()
1040 ast_moutdwm(ast, 0x1E6E2020, 0x02E1); in get_ddr3_info()
1058 ast_moutdwm(ast, 0x1E6E2020, 0x0160); in get_ddr3_info()
1111 static void ddr3_init(struct ast_private *ast, struct ast2300_dram_param *param) in ddr3_init() argument
1116 ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); in ddr3_init()
1117 ast_moutdwm(ast, 0x1E6E0018, 0x00000100); in ddr3_init()
1118 ast_moutdwm(ast, 0x1E6E0024, 0x00000000); in ddr3_init()
1119 ast_moutdwm(ast, 0x1E6E0034, 0x00000000); in ddr3_init()
1121 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ); in ddr3_init()
1122 ast_moutdwm(ast, 0x1E6E0068, param->reg_SADJ); in ddr3_init()
1124 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ | 0xC0000); in ddr3_init()
1127 ast_moutdwm(ast, 0x1E6E0004, param->dram_config); in ddr3_init()
1128 ast_moutdwm(ast, 0x1E6E0008, 0x90040f); in ddr3_init()
1129 ast_moutdwm(ast, 0x1E6E0010, param->reg_AC1); in ddr3_init()
1130 ast_moutdwm(ast, 0x1E6E0014, param->reg_AC2); in ddr3_init()
1131 ast_moutdwm(ast, 0x1E6E0020, param->reg_DQSIC); in ddr3_init()
1132 ast_moutdwm(ast, 0x1E6E0080, 0x00000000); in ddr3_init()
1133 ast_moutdwm(ast, 0x1E6E0084, 0x00000000); in ddr3_init()
1134 ast_moutdwm(ast, 0x1E6E0088, param->reg_DQIDLY); in ddr3_init()
1135 ast_moutdwm(ast, 0x1E6E0018, 0x4000A170); in ddr3_init()
1136 ast_moutdwm(ast, 0x1E6E0018, 0x00002370); in ddr3_init()
1137 ast_moutdwm(ast, 0x1E6E0038, 0x00000000); in ddr3_init()
1138 ast_moutdwm(ast, 0x1E6E0040, 0xFF444444); in ddr3_init()
1139 ast_moutdwm(ast, 0x1E6E0044, 0x22222222); in ddr3_init()
1140 ast_moutdwm(ast, 0x1E6E0048, 0x22222222); in ddr3_init()
1141 ast_moutdwm(ast, 0x1E6E004C, 0x00000002); in ddr3_init()
1142 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr3_init()
1143 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr3_init()
1144 ast_moutdwm(ast, 0x1E6E0054, 0); in ddr3_init()
1145 ast_moutdwm(ast, 0x1E6E0060, param->reg_DRV); in ddr3_init()
1146 ast_moutdwm(ast, 0x1E6E006C, param->reg_IOZ); in ddr3_init()
1147 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr3_init()
1148 ast_moutdwm(ast, 0x1E6E0074, 0x00000000); in ddr3_init()
1149 ast_moutdwm(ast, 0x1E6E0078, 0x00000000); in ddr3_init()
1150 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr3_init()
1153 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1155 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1158 data2 = (ast_mindwm(ast, 0x1E6E0064) & 0xfff3ffff) + 4; in ddr3_init()
1162 ast_moutdwm(ast, 0x1E6E0064, data2); in ddr3_init()
1168 data = ast_mindwm(ast, 0x1E6E0068) & 0xffff00ff; in ddr3_init()
1171 ast_moutdwm(ast, 0x1E6E0068, data); in ddr3_init()
1173 ast_moutdwm(ast, 0x1E6E0064, ast_mindwm(ast, 0x1E6E0064) | 0xC0000); in ddr3_init()
1175 data = ast_mindwm(ast, 0x1E6E0018) & 0xfffff1ff; in ddr3_init()
1176 ast_moutdwm(ast, 0x1E6E0018, data); in ddr3_init()
1178 ast_moutdwm(ast, 0x1E6E0018, data); in ddr3_init()
1180 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1183 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1186 ast_moutdwm(ast, 0x1E720058, ast_mindwm(ast, 0x1E6E0068) & 0xffff); in ddr3_init()
1187 data = ast_mindwm(ast, 0x1E6E0018) | 0xC00; in ddr3_init()
1188 ast_moutdwm(ast, 0x1E6E0018, data); in ddr3_init()
1190 ast_moutdwm(ast, 0x1E6E0034, 0x00000001); in ddr3_init()
1191 ast_moutdwm(ast, 0x1E6E000C, 0x00000040); in ddr3_init()
1194 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS | 0x100); in ddr3_init()
1195 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS); in ddr3_init()
1196 ast_moutdwm(ast, 0x1E6E0028, 0x00000005); in ddr3_init()
1197 ast_moutdwm(ast, 0x1E6E0028, 0x00000007); in ddr3_init()
1198 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr3_init()
1199 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr3_init()
1200 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS); in ddr3_init()
1201 ast_moutdwm(ast, 0x1E6E000C, 0x00005C08); in ddr3_init()
1202 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr3_init()
1204 ast_moutdwm(ast, 0x1E6E000C, 0x00005C01); in ddr3_init()
1212 ast_moutdwm(ast, 0x1E6E0034, data | 0x3); in ddr3_init()
1215 if ((cbr_dll2(ast, param) == false) && (retry++ < 10)) in ddr3_init()
1218 ast_moutdwm(ast, 0x1E6E0120, param->reg_FREQ); in ddr3_init()
1221 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr3_init()
1222 ast_moutdwm(ast, 0x1E6E0070, 0x221); in ddr3_init()
1224 data = ast_mindwm(ast, 0x1E6E0070); in ddr3_init()
1226 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr3_init()
1227 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr3_init()
1228 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr3_init()
1234 static void get_ddr2_info(struct ast_private *ast, struct ast2300_dram_param *param) in get_ddr2_info() argument
1238 ast_moutdwm(ast, 0x1E6E2000, 0x1688A8A8); in get_ddr2_info()
1241 trap = (ast_mindwm(ast, 0x1E6E2070) >> 25) & 0x3; in get_ddr2_info()
1255 ast_moutdwm(ast, 0x1E6E2020, 0x0130); in get_ddr2_info()
1270 ast_moutdwm(ast, 0x1E6E2020, 0x0190); in get_ddr2_info()
1301 ast_moutdwm(ast, 0x1E6E2020, 0x03F1); in get_ddr2_info()
1335 ast_moutdwm(ast, 0x1E6E2020, 0x01F0); in get_ddr2_info()
1368 ast_moutdwm(ast, 0x1E6E2020, 0x0230); in get_ddr2_info()
1383 ast_moutdwm(ast, 0x1E6E2020, 0x0261); in get_ddr2_info()
1399 ast_moutdwm(ast, 0x1E6E2020, 0x0120); in get_ddr2_info()
1415 ast_moutdwm(ast, 0x1E6E2020, 0x02A1); in get_ddr2_info()
1431 ast_moutdwm(ast, 0x1E6E2020, 0x0140); in get_ddr2_info()
1481 static void ddr2_init(struct ast_private *ast, struct ast2300_dram_param *param) in ddr2_init() argument
1486 ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); in ddr2_init()
1487 ast_moutdwm(ast, 0x1E6E0018, 0x00000100); in ddr2_init()
1488 ast_moutdwm(ast, 0x1E6E0024, 0x00000000); in ddr2_init()
1489 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ); in ddr2_init()
1490 ast_moutdwm(ast, 0x1E6E0068, param->reg_SADJ); in ddr2_init()
1492 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ | 0xC0000); in ddr2_init()
1495 ast_moutdwm(ast, 0x1E6E0004, param->dram_config); in ddr2_init()
1496 ast_moutdwm(ast, 0x1E6E0008, 0x90040f); in ddr2_init()
1497 ast_moutdwm(ast, 0x1E6E0010, param->reg_AC1); in ddr2_init()
1498 ast_moutdwm(ast, 0x1E6E0014, param->reg_AC2); in ddr2_init()
1499 ast_moutdwm(ast, 0x1E6E0020, param->reg_DQSIC); in ddr2_init()
1500 ast_moutdwm(ast, 0x1E6E0080, 0x00000000); in ddr2_init()
1501 ast_moutdwm(ast, 0x1E6E0084, 0x00000000); in ddr2_init()
1502 ast_moutdwm(ast, 0x1E6E0088, param->reg_DQIDLY); in ddr2_init()
1503 ast_moutdwm(ast, 0x1E6E0018, 0x4000A130); in ddr2_init()
1504 ast_moutdwm(ast, 0x1E6E0018, 0x00002330); in ddr2_init()
1505 ast_moutdwm(ast, 0x1E6E0038, 0x00000000); in ddr2_init()
1506 ast_moutdwm(ast, 0x1E6E0040, 0xFF808000); in ddr2_init()
1507 ast_moutdwm(ast, 0x1E6E0044, 0x88848466); in ddr2_init()
1508 ast_moutdwm(ast, 0x1E6E0048, 0x44440008); in ddr2_init()
1509 ast_moutdwm(ast, 0x1E6E004C, 0x00000000); in ddr2_init()
1510 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr2_init()
1511 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr2_init()
1512 ast_moutdwm(ast, 0x1E6E0054, 0); in ddr2_init()
1513 ast_moutdwm(ast, 0x1E6E0060, param->reg_DRV); in ddr2_init()
1514 ast_moutdwm(ast, 0x1E6E006C, param->reg_IOZ); in ddr2_init()
1515 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr2_init()
1516 ast_moutdwm(ast, 0x1E6E0074, 0x00000000); in ddr2_init()
1517 ast_moutdwm(ast, 0x1E6E0078, 0x00000000); in ddr2_init()
1518 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr2_init()
1522 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1524 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1527 data2 = (ast_mindwm(ast, 0x1E6E0064) & 0xfff3ffff) + 4; in ddr2_init()
1531 ast_moutdwm(ast, 0x1E6E0064, data2); in ddr2_init()
1537 data = ast_mindwm(ast, 0x1E6E0068) & 0xffff00ff; in ddr2_init()
1540 ast_moutdwm(ast, 0x1E6E0068, data); in ddr2_init()
1542 ast_moutdwm(ast, 0x1E6E0064, ast_mindwm(ast, 0x1E6E0064) | 0xC0000); in ddr2_init()
1544 data = ast_mindwm(ast, 0x1E6E0018) & 0xfffff1ff; in ddr2_init()
1545 ast_moutdwm(ast, 0x1E6E0018, data); in ddr2_init()
1547 ast_moutdwm(ast, 0x1E6E0018, data); in ddr2_init()
1549 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1552 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1555 ast_moutdwm(ast, 0x1E720058, ast_mindwm(ast, 0x1E6E0008) & 0xffff); in ddr2_init()
1556 data = ast_mindwm(ast, 0x1E6E0018) | 0xC00; in ddr2_init()
1557 ast_moutdwm(ast, 0x1E6E0018, data); in ddr2_init()
1559 ast_moutdwm(ast, 0x1E6E0034, 0x00000001); in ddr2_init()
1560 ast_moutdwm(ast, 0x1E6E000C, 0x00000000); in ddr2_init()
1563 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS | 0x100); in ddr2_init()
1564 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS); in ddr2_init()
1565 ast_moutdwm(ast, 0x1E6E0028, 0x00000005); in ddr2_init()
1566 ast_moutdwm(ast, 0x1E6E0028, 0x00000007); in ddr2_init()
1567 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr2_init()
1568 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr2_init()
1570 ast_moutdwm(ast, 0x1E6E000C, 0x00005C08); in ddr2_init()
1571 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS); in ddr2_init()
1572 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr2_init()
1573 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS | 0x380); in ddr2_init()
1574 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr2_init()
1575 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS); in ddr2_init()
1576 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr2_init()
1578 ast_moutdwm(ast, 0x1E6E000C, 0x7FFF5C01); in ddr2_init()
1586 ast_moutdwm(ast, 0x1E6E0034, data | 0x3); in ddr2_init()
1587 ast_moutdwm(ast, 0x1E6E0120, param->reg_FREQ); in ddr2_init()
1590 if ((cbr_dll2(ast, param) == false) && (retry++ < 10)) in ddr2_init()
1595 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr2_init()
1596 ast_moutdwm(ast, 0x1E6E0070, 0x221); in ddr2_init()
1598 data = ast_mindwm(ast, 0x1E6E0070); in ddr2_init()
1600 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr2_init()
1601 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr2_init()
1602 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr2_init()
1609 struct ast_private *ast = dev->dev_private; in ast_init_dram_2300() local
1614 reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_init_dram_2300()
1616 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_init_dram_2300()
1617 ast_write32(ast, 0xf000, 0x1); in ast_init_dram_2300()
1618 ast_write32(ast, 0x12000, 0x1688a8a8); in ast_init_dram_2300()
1621 } while (ast_read32(ast, 0x12000) != 0x1); in ast_init_dram_2300()
1623 ast_write32(ast, 0x10000, 0xfc600309); in ast_init_dram_2300()
1626 } while (ast_read32(ast, 0x10000) != 0x1); in ast_init_dram_2300()
1629 temp = ast_read32(ast, 0x12008); in ast_init_dram_2300()
1631 ast_write32(ast, 0x12008, temp); in ast_init_dram_2300()
1636 param.dram_chipid = ast->dram_type; in ast_init_dram_2300()
1637 param.dram_freq = ast->mclk; in ast_init_dram_2300()
1638 param.vram_size = ast->vram_size; in ast_init_dram_2300()
1641 get_ddr3_info(ast, ¶m); in ast_init_dram_2300()
1642 ddr3_init(ast, ¶m); in ast_init_dram_2300()
1644 get_ddr2_info(ast, ¶m); in ast_init_dram_2300()
1645 ddr2_init(ast, ¶m); in ast_init_dram_2300()
1648 temp = ast_mindwm(ast, 0x1e6e2040); in ast_init_dram_2300()
1649 ast_moutdwm(ast, 0x1e6e2040, temp | 0x40); in ast_init_dram_2300()
1654 reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_init_dram_2300()