Lines Matching refs:dumb_ctrl
109 uint32_t dumb_ctrl; in armada_drm_crtc_update() local
111 dumb_ctrl = dcrtc->cfg_dumb_ctrl; in armada_drm_crtc_update()
114 dumb_ctrl |= CFG_DUMB_ENA; in armada_drm_crtc_update()
123 (dumb_ctrl & DUMB_MASK) == DUMB24_RGB888_0) { in armada_drm_crtc_update()
124 dumb_ctrl &= ~DUMB_MASK; in armada_drm_crtc_update()
125 dumb_ctrl |= DUMB_BLANK; in armada_drm_crtc_update()
137 dumb_ctrl |= CFG_INV_CSYNC; in armada_drm_crtc_update()
139 dumb_ctrl |= CFG_INV_HSYNC; in armada_drm_crtc_update()
141 dumb_ctrl |= CFG_INV_VSYNC; in armada_drm_crtc_update()
143 if (dcrtc->dumb_ctrl != dumb_ctrl) { in armada_drm_crtc_update()
144 dcrtc->dumb_ctrl = dumb_ctrl; in armada_drm_crtc_update()
145 writel_relaxed(dumb_ctrl, dcrtc->base + LCD_SPU_DUMB_CTRL); in armada_drm_crtc_update()
536 val = dcrtc->dumb_ctrl & ~CFG_DUMB_ENA; in armada_drm_crtc_mode_set()
537 if (val != dcrtc->dumb_ctrl) { in armada_drm_crtc_mode_set()
538 dcrtc->dumb_ctrl = val; in armada_drm_crtc_mode_set()