162 	struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);  in zynq_gpio_get_value()  local
166 	data = readl_relaxed(gpio->base_addr +  in zynq_gpio_get_value()
186 	struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);  in zynq_gpio_set_value()  local
206 	writel_relaxed(state, gpio->base_addr + reg_offset);  in zynq_gpio_set_value()
223 	struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);  in zynq_gpio_dir_in()  local
232 	reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));  in zynq_gpio_dir_in()
234 	writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));  in zynq_gpio_dir_in()
256 	struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);  in zynq_gpio_dir_out()  local
261 	reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));  in zynq_gpio_dir_out()
263 	writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));  in zynq_gpio_dir_out()
266 	reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));  in zynq_gpio_dir_out()
268 	writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));  in zynq_gpio_dir_out()
286 	struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);  in zynq_gpio_irq_mask()  local
291 		       gpio->base_addr + ZYNQ_GPIO_INTDIS_OFFSET(bank_num));  in zynq_gpio_irq_mask()
306 	struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);  in zynq_gpio_irq_unmask()  local
311 		       gpio->base_addr + ZYNQ_GPIO_INTEN_OFFSET(bank_num));  in zynq_gpio_irq_unmask()
325 	struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);  in zynq_gpio_irq_ack()  local
330 		       gpio->base_addr + ZYNQ_GPIO_INTSTS_OFFSET(bank_num));  in zynq_gpio_irq_ack()
375 	struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);  in zynq_gpio_set_irq_type()  local
380 	int_type = readl_relaxed(gpio->base_addr +  in zynq_gpio_set_irq_type()
382 	int_pol = readl_relaxed(gpio->base_addr +  in zynq_gpio_set_irq_type()
384 	int_any = readl_relaxed(gpio->base_addr +  in zynq_gpio_set_irq_type()
419 		       gpio->base_addr + ZYNQ_GPIO_INTTYPE_OFFSET(bank_num));  in zynq_gpio_set_irq_type()
421 		       gpio->base_addr + ZYNQ_GPIO_INTPOL_OFFSET(bank_num));  in zynq_gpio_set_irq_type()
423 		       gpio->base_addr + ZYNQ_GPIO_INTANY_OFFSET(bank_num));  in zynq_gpio_set_irq_type()
438 	struct zynq_gpio *gpio = irq_data_get_irq_chip_data(data);  in zynq_gpio_set_wake()  local
440 	irq_set_irq_wake(gpio->irq, on);  in zynq_gpio_set_wake()
469 static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio,  in zynq_gpio_handle_bank_irq()  argument
474 	struct irq_domain *irqdomain = gpio->chip.irqdomain;  in zynq_gpio_handle_bank_irq()
503 	struct zynq_gpio *gpio = irq_get_handler_data(irq);  in zynq_gpio_irqhandler()  local
509 		int_sts = readl_relaxed(gpio->base_addr +  in zynq_gpio_irqhandler()
511 		int_enb = readl_relaxed(gpio->base_addr +  in zynq_gpio_irqhandler()
513 		zynq_gpio_handle_bank_irq(gpio, bank_num, int_sts & ~int_enb);  in zynq_gpio_irqhandler()
546 	struct zynq_gpio *gpio = platform_get_drvdata(pdev);  in zynq_gpio_runtime_suspend()  local
548 	clk_disable_unprepare(gpio->clk);  in zynq_gpio_runtime_suspend()
556 	struct zynq_gpio *gpio = platform_get_drvdata(pdev);  in zynq_gpio_runtime_resume()  local
558 	return clk_prepare_enable(gpio->clk);  in zynq_gpio_runtime_resume()
599 	struct zynq_gpio *gpio;  in zynq_gpio_probe()  local
603 	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);  in zynq_gpio_probe()
604 	if (!gpio)  in zynq_gpio_probe()
607 	platform_set_drvdata(pdev, gpio);  in zynq_gpio_probe()
610 	gpio->base_addr = devm_ioremap_resource(&pdev->dev, res);  in zynq_gpio_probe()
611 	if (IS_ERR(gpio->base_addr))  in zynq_gpio_probe()
612 		return PTR_ERR(gpio->base_addr);  in zynq_gpio_probe()
614 	gpio->irq = platform_get_irq(pdev, 0);  in zynq_gpio_probe()
615 	if (gpio->irq < 0) {  in zynq_gpio_probe()
617 		return gpio->irq;  in zynq_gpio_probe()
621 	chip = &gpio->chip;  in zynq_gpio_probe()
635 	gpio->clk = devm_clk_get(&pdev->dev, NULL);  in zynq_gpio_probe()
636 	if (IS_ERR(gpio->clk)) {  in zynq_gpio_probe()
638 		return PTR_ERR(gpio->clk);  in zynq_gpio_probe()
640 	ret = clk_prepare_enable(gpio->clk);  in zynq_gpio_probe()
655 		writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr +  in zynq_gpio_probe()
665 	gpiochip_set_chained_irqchip(chip, &zynq_gpio_edge_irqchip, gpio->irq,  in zynq_gpio_probe()
676 	clk_disable_unprepare(gpio->clk);  in zynq_gpio_probe()
689 	struct zynq_gpio *gpio = platform_get_drvdata(pdev);  in zynq_gpio_remove()  local
692 	gpiochip_remove(&gpio->chip);  in zynq_gpio_remove()
693 	clk_disable_unprepare(gpio->clk);  in zynq_gpio_remove()