Lines Matching refs:writeb
97 writeb(gpiodir, chip->base + GPIODIR); in pl061_direction_input()
114 writeb(!!value << offset, chip->base + (BIT(offset + 2))); in pl061_direction_output()
117 writeb(gpiodir, chip->base + GPIODIR); in pl061_direction_output()
123 writeb(!!value << offset, chip->base + (BIT(offset + 2))); in pl061_direction_output()
140 writeb(!!value << offset, chip->base + (BIT(offset + 2))); in pl061_set_value()
181 writeb(gpiois, chip->base + GPIOIS); in pl061_irq_type()
182 writeb(gpioibe, chip->base + GPIOIBE); in pl061_irq_type()
183 writeb(gpioiev, chip->base + GPIOIEV); in pl061_irq_type()
201 writeb(pending, chip->base + GPIOIC); in pl061_irq_handler()
220 writeb(gpioie, chip->base + GPIOIE); in pl061_irq_mask()
233 writeb(gpioie, chip->base + GPIOIE); in pl061_irq_unmask()
293 writeb(0, chip->base + GPIOIE); /* disable irqs */ in pl061_probe()
363 writeb(chip->csave_regs.gpio_is, chip->base + GPIOIS); in pl061_resume()
364 writeb(chip->csave_regs.gpio_ibe, chip->base + GPIOIBE); in pl061_resume()
365 writeb(chip->csave_regs.gpio_iev, chip->base + GPIOIEV); in pl061_resume()
366 writeb(chip->csave_regs.gpio_ie, chip->base + GPIOIE); in pl061_resume()