62 static int pl061_gpio_request(struct gpio_chip *gc, unsigned offset)  in pl061_gpio_request()  argument
69 	int gpio = gc->base + offset;  in pl061_gpio_request()
76 static void pl061_gpio_free(struct gpio_chip *gc, unsigned offset)  in pl061_gpio_free()  argument
79 	int gpio = gc->base + offset;  in pl061_gpio_free()
85 static int pl061_direction_input(struct gpio_chip *gc, unsigned offset)  in pl061_direction_input()  argument
91 	if (offset >= gc->ngpio)  in pl061_direction_input()
96 	gpiodir &= ~(BIT(offset));  in pl061_direction_input()
103 static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,  in pl061_direction_output()  argument
110 	if (offset >= gc->ngpio)  in pl061_direction_output()
114 	writeb(!!value << offset, chip->base + (BIT(offset + 2)));  in pl061_direction_output()
116 	gpiodir |= BIT(offset);  in pl061_direction_output()
123 	writeb(!!value << offset, chip->base + (BIT(offset + 2)));  in pl061_direction_output()
129 static int pl061_get_value(struct gpio_chip *gc, unsigned offset)  in pl061_get_value()  argument
133 	return !!readb(chip->base + (BIT(offset + 2)));  in pl061_get_value()
136 static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value)  in pl061_set_value()  argument
140 	writeb(!!value << offset, chip->base + (BIT(offset + 2)));  in pl061_set_value()
147 	int offset = irqd_to_hwirq(d);  in pl061_irq_type()  local
150 	u8 bit = BIT(offset);  in pl061_irq_type()
152 	if (offset < 0 || offset >= PL061_GPIO_NR)  in pl061_irq_type()
193 	int offset;  in pl061_irq_handler()  local
203 		for_each_set_bit(offset, &pending, PL061_GPIO_NR)  in pl061_irq_handler()
205 							    offset));  in pl061_irq_handler()
331 	int offset;  in pl061_suspend()  local
340 	for (offset = 0; offset < PL061_GPIO_NR; offset++) {  in pl061_suspend()
341 		if (chip->csave_regs.gpio_dir & (BIT(offset)))  in pl061_suspend()
343 				pl061_get_value(&chip->gc, offset) << offset;  in pl061_suspend()
352 	int offset;  in pl061_resume()  local
354 	for (offset = 0; offset < PL061_GPIO_NR; offset++) {  in pl061_resume()
355 		if (chip->csave_regs.gpio_dir & (BIT(offset)))  in pl061_resume()
356 			pl061_direction_output(&chip->gc, offset,  in pl061_resume()
358 					(BIT(offset)));  in pl061_resume()
360 			pl061_direction_input(&chip->gc, offset);  in pl061_resume()