Lines Matching refs:ioread32
116 reg_val = ioread32(&chip->reg->po); in pch_gpio_set()
130 return ioread32(&chip->reg->pi) & (1 << nr); in pch_gpio_get()
143 reg_val = ioread32(&chip->reg->po); in pch_gpio_direction_output()
150 pm = ioread32(&chip->reg->pm) & ((1 << gpio_pins[chip->ioh]) - 1); in pch_gpio_direction_output()
166 pm = ioread32(&chip->reg->pm) & ((1 << gpio_pins[chip->ioh]) - 1); in pch_gpio_direction_input()
180 chip->pch_gpio_reg.ien_reg = ioread32(&chip->reg->ien); in pch_gpio_save_reg_conf()
181 chip->pch_gpio_reg.imask_reg = ioread32(&chip->reg->imask); in pch_gpio_save_reg_conf()
182 chip->pch_gpio_reg.po_reg = ioread32(&chip->reg->po); in pch_gpio_save_reg_conf()
183 chip->pch_gpio_reg.pm_reg = ioread32(&chip->reg->pm); in pch_gpio_save_reg_conf()
184 chip->pch_gpio_reg.im0_reg = ioread32(&chip->reg->im0); in pch_gpio_save_reg_conf()
186 chip->pch_gpio_reg.im1_reg = ioread32(&chip->reg->im1); in pch_gpio_save_reg_conf()
189 ioread32(&chip->reg->gpio_use_sel); in pch_gpio_save_reg_conf()
279 im = ioread32(im_reg) & ~(PCH_IM_MASK << (im_pos * 4)); in pch_irq_type()
320 u32 reg_val = ioread32(&chip->reg->istatus); in pch_gpio_handler()