Lines Matching refs:l

101 	u32 l;  in omap_set_gpio_direction()  local
104 l = readl_relaxed(reg); in omap_set_gpio_direction()
106 l |= BIT(gpio); in omap_set_gpio_direction()
108 l &= ~(BIT(gpio)); in omap_set_gpio_direction()
109 writel_relaxed(l, reg); in omap_set_gpio_direction()
110 bank->context.oe = l; in omap_set_gpio_direction()
119 u32 l = BIT(offset); in omap_set_gpio_dataout_reg() local
123 bank->context.dataout |= l; in omap_set_gpio_dataout_reg()
126 bank->context.dataout &= ~l; in omap_set_gpio_dataout_reg()
129 writel_relaxed(l, reg); in omap_set_gpio_dataout_reg()
138 u32 l; in omap_set_gpio_dataout_mask() local
140 l = readl_relaxed(reg); in omap_set_gpio_dataout_mask()
142 l |= gpio_bit; in omap_set_gpio_dataout_mask()
144 l &= ~gpio_bit; in omap_set_gpio_dataout_mask()
145 writel_relaxed(l, reg); in omap_set_gpio_dataout_mask()
146 bank->context.dataout = l; in omap_set_gpio_dataout_mask()
165 int l = readl_relaxed(base + reg); in omap_gpio_rmw() local
168 l |= mask; in omap_gpio_rmw()
170 l &= ~mask; in omap_gpio_rmw()
172 writel_relaxed(l, base + reg); in omap_gpio_rmw()
215 u32 l; in omap2_set_gpio_debounce() local
227 l = BIT(offset); in omap2_set_gpio_debounce()
237 val |= l; in omap2_set_gpio_debounce()
239 val &= ~l; in omap2_set_gpio_debounce()
357 u32 l = 0; in omap_toggle_gpio_edge_triggering() local
364 l = readl_relaxed(reg); in omap_toggle_gpio_edge_triggering()
365 if ((l >> gpio) & 1) in omap_toggle_gpio_edge_triggering()
366 l &= ~(BIT(gpio)); in omap_toggle_gpio_edge_triggering()
368 l |= BIT(gpio); in omap_toggle_gpio_edge_triggering()
370 writel_relaxed(l, reg); in omap_toggle_gpio_edge_triggering()
381 u32 l = 0; in omap_set_gpio_triggering() local
388 l = readl_relaxed(reg); in omap_set_gpio_triggering()
392 l |= BIT(gpio); in omap_set_gpio_triggering()
394 l &= ~(BIT(gpio)); in omap_set_gpio_triggering()
398 writel_relaxed(l, reg); in omap_set_gpio_triggering()
406 l = readl_relaxed(reg); in omap_set_gpio_triggering()
407 l &= ~(3 << (gpio << 1)); in omap_set_gpio_triggering()
409 l |= 2 << (gpio << 1); in omap_set_gpio_triggering()
411 l |= BIT(gpio << 1); in omap_set_gpio_triggering()
417 writel_relaxed(l, reg); in omap_set_gpio_triggering()
544 u32 l; in omap_get_gpio_irqbank_mask() local
548 l = readl_relaxed(reg); in omap_get_gpio_irqbank_mask()
550 l = ~l; in omap_get_gpio_irqbank_mask()
551 l &= mask; in omap_get_gpio_irqbank_mask()
552 return l; in omap_get_gpio_irqbank_mask()
558 u32 l; in omap_enable_gpio_irqbank() local
562 l = gpio_mask; in omap_enable_gpio_irqbank()
566 l = readl_relaxed(reg); in omap_enable_gpio_irqbank()
568 l &= ~gpio_mask; in omap_enable_gpio_irqbank()
570 l |= gpio_mask; in omap_enable_gpio_irqbank()
571 bank->context.irqenable1 = l; in omap_enable_gpio_irqbank()
574 writel_relaxed(l, reg); in omap_enable_gpio_irqbank()
580 u32 l; in omap_disable_gpio_irqbank() local
584 l = gpio_mask; in omap_disable_gpio_irqbank()
588 l = readl_relaxed(reg); in omap_disable_gpio_irqbank()
590 l |= gpio_mask; in omap_disable_gpio_irqbank()
592 l &= ~gpio_mask; in omap_disable_gpio_irqbank()
593 bank->context.irqenable1 = l; in omap_disable_gpio_irqbank()
596 writel_relaxed(l, reg); in omap_disable_gpio_irqbank()
1029 u32 l = 0xffffffff; in omap_gpio_mod_init() local
1032 l = 0xffff; in omap_gpio_mod_init()
1035 writel_relaxed(l, bank->base + bank->regs->irqenable); in omap_gpio_mod_init()
1039 omap_gpio_rmw(base, bank->regs->irqenable, l, in omap_gpio_mod_init()
1041 omap_gpio_rmw(base, bank->regs->irqstatus, l, in omap_gpio_mod_init()
1313 u32 l = 0, gen, gen0, gen1; in omap_gpio_runtime_resume() local
1364 l = readl_relaxed(bank->base + bank->regs->datain); in omap_gpio_runtime_resume()
1372 l ^= bank->saved_datain; in omap_gpio_runtime_resume()
1373 l &= bank->enabled_non_wakeup_gpios; in omap_gpio_runtime_resume()
1379 gen0 = l & bank->context.fallingdetect; in omap_gpio_runtime_resume()
1382 gen1 = l & bank->context.risingdetect; in omap_gpio_runtime_resume()
1386 gen = l & (~(bank->context.fallingdetect) & in omap_gpio_runtime_resume()
1405 writel_relaxed(old0 | l, bank->base + in omap_gpio_runtime_resume()
1407 writel_relaxed(old1 | l, bank->base + in omap_gpio_runtime_resume()