Lines Matching refs:base

52 	void __iomem *base;  member
100 void __iomem *reg = bank->base; in omap_set_gpio_direction()
118 void __iomem *reg = bank->base; in omap_set_gpio_dataout_reg()
136 void __iomem *reg = bank->base + bank->regs->dataout; in omap_set_gpio_dataout_mask()
151 void __iomem *reg = bank->base + bank->regs->datain; in omap_get_gpio_datain()
158 void __iomem *reg = bank->base + bank->regs->dataout; in omap_get_gpio_dataout()
163 static inline void omap_gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) in omap_gpio_rmw() argument
165 int l = readl_relaxed(base + reg); in omap_gpio_rmw()
172 writel_relaxed(l, base + reg); in omap_gpio_rmw()
182 bank->base + bank->regs->debounce_en); in omap_gpio_dbck_enable()
194 writel_relaxed(0, bank->base + bank->regs->debounce_en); in omap_gpio_dbck_disable()
230 reg = bank->base + bank->regs->debounce; in omap2_set_gpio_debounce()
233 reg = bank->base + bank->regs->debounce_en; in omap2_set_gpio_debounce()
282 bank->base + bank->regs->debounce_en); in omap_clear_gpio_debounce()
286 writel_relaxed(bank->context.debounce, bank->base + in omap_clear_gpio_debounce()
296 void __iomem *base = bank->base; in omap_set_gpio_trigger() local
299 omap_gpio_rmw(base, bank->regs->leveldetect0, gpio_bit, in omap_set_gpio_trigger()
301 omap_gpio_rmw(base, bank->regs->leveldetect1, gpio_bit, in omap_set_gpio_trigger()
303 omap_gpio_rmw(base, bank->regs->risingdetect, gpio_bit, in omap_set_gpio_trigger()
305 omap_gpio_rmw(base, bank->regs->fallingdetect, gpio_bit, in omap_set_gpio_trigger()
309 readl_relaxed(bank->base + bank->regs->leveldetect0); in omap_set_gpio_trigger()
311 readl_relaxed(bank->base + bank->regs->leveldetect1); in omap_set_gpio_trigger()
313 readl_relaxed(bank->base + bank->regs->risingdetect); in omap_set_gpio_trigger()
315 readl_relaxed(bank->base + bank->regs->fallingdetect); in omap_set_gpio_trigger()
318 omap_gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); in omap_set_gpio_trigger()
320 readl_relaxed(bank->base + bank->regs->wkup_en); in omap_set_gpio_trigger()
345 readl_relaxed(bank->base + bank->regs->leveldetect0) | in omap_set_gpio_trigger()
346 readl_relaxed(bank->base + bank->regs->leveldetect1); in omap_set_gpio_trigger()
356 void __iomem *reg = bank->base; in omap_toggle_gpio_edge_triggering()
379 void __iomem *reg = bank->base; in omap_set_gpio_triggering()
380 void __iomem *base = bank->base; in omap_set_gpio_triggering() local
414 omap_gpio_rmw(base, bank->regs->wkup_en, BIT(gpio), trigger); in omap_set_gpio_triggering()
416 readl_relaxed(bank->base + bank->regs->wkup_en); in omap_set_gpio_triggering()
425 void __iomem *reg = bank->base + bank->regs->pinctrl; in omap_enable_gpio_module()
432 void __iomem *reg = bank->base + bank->regs->ctrl; in omap_enable_gpio_module()
445 void __iomem *base = bank->base; in omap_disable_gpio_module() local
451 omap_gpio_rmw(base, bank->regs->wkup_en, BIT(offset), 0); in omap_disable_gpio_module()
453 readl_relaxed(bank->base + bank->regs->wkup_en); in omap_disable_gpio_module()
457 void __iomem *reg = bank->base + bank->regs->ctrl; in omap_disable_gpio_module()
470 void __iomem *reg = bank->base + bank->regs->direction; in omap_gpio_is_input()
520 void __iomem *reg = bank->base; in omap_clear_gpio_irqbank()
527 reg = bank->base + bank->regs->irqstatus2; in omap_clear_gpio_irqbank()
543 void __iomem *reg = bank->base; in omap_get_gpio_irqbank_mask()
557 void __iomem *reg = bank->base; in omap_enable_gpio_irqbank()
579 void __iomem *reg = bank->base; in omap_disable_gpio_irqbank()
635 writel_relaxed(bank->context.wake_en, bank->base + bank->regs->wkup_en); in omap_set_gpio_wakeup()
727 isr_reg = bank->base + bank->regs->irqstatus; in omap_gpio_irq_handler()
873 void __iomem *mask_reg = bank->base + in omap_mpuio_suspend_noirq()
888 void __iomem *mask_reg = bank->base + in omap_mpuio_resume_noirq()
939 reg = bank->base + bank->regs->direction; in omap_gpio_get_direction()
1019 rev = readw_relaxed(bank->base + bank->regs->revision); in omap_gpio_show_rev()
1028 void __iomem *base = bank->base; in omap_gpio_mod_init() local
1035 writel_relaxed(l, bank->base + bank->regs->irqenable); in omap_gpio_mod_init()
1039 omap_gpio_rmw(base, bank->regs->irqenable, l, in omap_gpio_mod_init()
1041 omap_gpio_rmw(base, bank->regs->irqstatus, l, in omap_gpio_mod_init()
1044 writel_relaxed(0, base + bank->regs->debounce_en); in omap_gpio_mod_init()
1047 bank->context.oe = readl_relaxed(bank->base + bank->regs->direction); in omap_gpio_mod_init()
1050 writel_relaxed(0, base + bank->regs->ctrl); in omap_gpio_mod_init()
1079 bank->chip.base = OMAP_MPUIO(0); in omap_gpio_chip_init()
1082 bank->chip.base = gpio; in omap_gpio_chip_init()
1206 bank->base = devm_ioremap_resource(dev, res); in omap_gpio_probe()
1207 if (IS_ERR(bank->base)) { in omap_gpio_probe()
1209 return PTR_ERR(bank->base); in omap_gpio_probe()
1265 bank->base + bank->regs->fallingdetect); in omap_gpio_runtime_suspend()
1269 bank->base + bank->regs->risingdetect); in omap_gpio_runtime_suspend()
1283 bank->saved_datain = readl_relaxed(bank->base + in omap_gpio_runtime_suspend()
1291 writel_relaxed(l1, bank->base + bank->regs->fallingdetect); in omap_gpio_runtime_suspend()
1292 writel_relaxed(l2, bank->base + bank->regs->risingdetect); in omap_gpio_runtime_suspend()
1341 bank->base + bank->regs->fallingdetect); in omap_gpio_runtime_resume()
1343 bank->base + bank->regs->risingdetect); in omap_gpio_runtime_resume()
1364 l = readl_relaxed(bank->base + bank->regs->datain); in omap_gpio_runtime_resume()
1394 old0 = readl_relaxed(bank->base + bank->regs->leveldetect0); in omap_gpio_runtime_resume()
1395 old1 = readl_relaxed(bank->base + bank->regs->leveldetect1); in omap_gpio_runtime_resume()
1398 writel_relaxed(old0 | gen, bank->base + in omap_gpio_runtime_resume()
1400 writel_relaxed(old1 | gen, bank->base + in omap_gpio_runtime_resume()
1405 writel_relaxed(old0 | l, bank->base + in omap_gpio_runtime_resume()
1407 writel_relaxed(old1 | l, bank->base + in omap_gpio_runtime_resume()
1410 writel_relaxed(old0, bank->base + bank->regs->leveldetect0); in omap_gpio_runtime_resume()
1411 writel_relaxed(old1, bank->base + bank->regs->leveldetect1); in omap_gpio_runtime_resume()
1451 void __iomem *base = p->base; in omap_gpio_init_context() local
1453 p->context.ctrl = readl_relaxed(base + regs->ctrl); in omap_gpio_init_context()
1454 p->context.oe = readl_relaxed(base + regs->direction); in omap_gpio_init_context()
1455 p->context.wake_en = readl_relaxed(base + regs->wkup_en); in omap_gpio_init_context()
1456 p->context.leveldetect0 = readl_relaxed(base + regs->leveldetect0); in omap_gpio_init_context()
1457 p->context.leveldetect1 = readl_relaxed(base + regs->leveldetect1); in omap_gpio_init_context()
1458 p->context.risingdetect = readl_relaxed(base + regs->risingdetect); in omap_gpio_init_context()
1459 p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect); in omap_gpio_init_context()
1460 p->context.irqenable1 = readl_relaxed(base + regs->irqenable); in omap_gpio_init_context()
1461 p->context.irqenable2 = readl_relaxed(base + regs->irqenable2); in omap_gpio_init_context()
1464 p->context.dataout = readl_relaxed(base + regs->set_dataout); in omap_gpio_init_context()
1466 p->context.dataout = readl_relaxed(base + regs->dataout); in omap_gpio_init_context()
1474 bank->base + bank->regs->wkup_en); in omap_gpio_restore_context()
1475 writel_relaxed(bank->context.ctrl, bank->base + bank->regs->ctrl); in omap_gpio_restore_context()
1477 bank->base + bank->regs->leveldetect0); in omap_gpio_restore_context()
1479 bank->base + bank->regs->leveldetect1); in omap_gpio_restore_context()
1481 bank->base + bank->regs->risingdetect); in omap_gpio_restore_context()
1483 bank->base + bank->regs->fallingdetect); in omap_gpio_restore_context()
1486 bank->base + bank->regs->set_dataout); in omap_gpio_restore_context()
1489 bank->base + bank->regs->dataout); in omap_gpio_restore_context()
1490 writel_relaxed(bank->context.oe, bank->base + bank->regs->direction); in omap_gpio_restore_context()
1493 writel_relaxed(bank->context.debounce, bank->base + in omap_gpio_restore_context()
1496 bank->base + bank->regs->debounce_en); in omap_gpio_restore_context()
1500 bank->base + bank->regs->irqenable); in omap_gpio_restore_context()
1502 bank->base + bank->regs->irqenable2); in omap_gpio_restore_context()