Lines Matching refs:pvt
276 u64 (*get_tolm)(struct sbridge_pvt *pvt);
277 u64 (*get_tohm)(struct sbridge_pvt *pvt);
284 u8 (*get_node_id)(struct sbridge_pvt *pvt);
285 enum mem_type (*get_memory_type)(struct sbridge_pvt *pvt);
645 static u64 sbridge_get_tolm(struct sbridge_pvt *pvt) in sbridge_get_tolm() argument
650 pci_read_config_dword(pvt->pci_sad1, TOLM, ®); in sbridge_get_tolm()
654 static u64 sbridge_get_tohm(struct sbridge_pvt *pvt) in sbridge_get_tohm() argument
658 pci_read_config_dword(pvt->pci_sad1, TOHM, ®); in sbridge_get_tohm()
662 static u64 ibridge_get_tolm(struct sbridge_pvt *pvt) in ibridge_get_tolm() argument
666 pci_read_config_dword(pvt->pci_br1, TOLM, ®); in ibridge_get_tolm()
671 static u64 ibridge_get_tohm(struct sbridge_pvt *pvt) in ibridge_get_tohm() argument
675 pci_read_config_dword(pvt->pci_br1, TOHM, ®); in ibridge_get_tohm()
685 static enum mem_type get_memory_type(struct sbridge_pvt *pvt) in get_memory_type() argument
690 if (pvt->pci_ddrio) { in get_memory_type()
691 pci_read_config_dword(pvt->pci_ddrio, pvt->info.rankcfgr, in get_memory_type()
704 static enum mem_type haswell_get_memory_type(struct sbridge_pvt *pvt) in haswell_get_memory_type() argument
710 if (!pvt->pci_ddrio) in haswell_get_memory_type()
713 pci_read_config_dword(pvt->pci_ddrio, in haswell_get_memory_type()
719 pci_read_config_dword(pvt->pci_ta, MCMTR, ®); in haswell_get_memory_type()
736 static u8 get_node_id(struct sbridge_pvt *pvt) in get_node_id() argument
739 pci_read_config_dword(pvt->pci_br0, SAD_CONTROL, ®); in get_node_id()
743 static u8 haswell_get_node_id(struct sbridge_pvt *pvt) in haswell_get_node_id() argument
747 pci_read_config_dword(pvt->pci_sad1, SAD_CONTROL, ®); in haswell_get_node_id()
751 static u64 haswell_get_tolm(struct sbridge_pvt *pvt) in haswell_get_tolm() argument
755 pci_read_config_dword(pvt->info.pci_vtd, HASWELL_TOLM, ®); in haswell_get_tolm()
759 static u64 haswell_get_tohm(struct sbridge_pvt *pvt) in haswell_get_tohm() argument
764 pci_read_config_dword(pvt->info.pci_vtd, HASWELL_TOHM_0, ®); in haswell_get_tohm()
766 pci_read_config_dword(pvt->info.pci_vtd, HASWELL_TOHM_1, ®); in haswell_get_tohm()
851 struct sbridge_pvt *pvt = mci->pvt_info; in get_dimm_config() local
859 if (pvt->info.type == HASWELL || pvt->info.type == BROADWELL) in get_dimm_config()
860 pci_read_config_dword(pvt->pci_sad1, SAD_TARGET, ®); in get_dimm_config()
862 pci_read_config_dword(pvt->pci_br0, SAD_TARGET, ®); in get_dimm_config()
864 pvt->sbridge_dev->source_id = SOURCE_ID(reg); in get_dimm_config()
866 pvt->sbridge_dev->node_id = pvt->info.get_node_id(pvt); in get_dimm_config()
868 pvt->sbridge_dev->mc, in get_dimm_config()
869 pvt->sbridge_dev->node_id, in get_dimm_config()
870 pvt->sbridge_dev->source_id); in get_dimm_config()
872 pci_read_config_dword(pvt->pci_ras, RASENABLES, ®); in get_dimm_config()
875 pvt->is_mirrored = true; in get_dimm_config()
878 pvt->is_mirrored = false; in get_dimm_config()
881 pci_read_config_dword(pvt->pci_ta, MCMTR, &pvt->info.mcmtr); in get_dimm_config()
882 if (IS_LOCKSTEP_ENABLED(pvt->info.mcmtr)) { in get_dimm_config()
885 pvt->is_lockstep = true; in get_dimm_config()
889 pvt->is_lockstep = false; in get_dimm_config()
891 if (IS_CLOSE_PG(pvt->info.mcmtr)) { in get_dimm_config()
893 pvt->is_close_pg = true; in get_dimm_config()
896 pvt->is_close_pg = false; in get_dimm_config()
899 mtype = pvt->info.get_memory_type(pvt); in get_dimm_config()
918 pci_read_config_dword(pvt->pci_tad[i], in get_dimm_config()
922 pvt->channel[i].dimms++; in get_dimm_config()
924 ranks = numrank(pvt->info.type, mtr); in get_dimm_config()
932 pvt->sbridge_dev->mc, i, j, in get_dimm_config()
953 pvt->sbridge_dev->source_id, i, j); in get_dimm_config()
963 struct sbridge_pvt *pvt = mci->pvt_info; in get_memory_layout() local
975 pvt->tolm = pvt->info.get_tolm(pvt); in get_memory_layout()
976 tmp_mb = (1 + pvt->tolm) >> 20; in get_memory_layout()
980 gb, (mb*1000)/1024, (u64)pvt->tolm); in get_memory_layout()
983 pvt->tohm = pvt->info.get_tohm(pvt); in get_memory_layout()
984 tmp_mb = (1 + pvt->tohm) >> 20; in get_memory_layout()
988 gb, (mb*1000)/1024, (u64)pvt->tohm); in get_memory_layout()
997 for (n_sads = 0; n_sads < pvt->info.max_sad; n_sads++) { in get_memory_layout()
999 pci_read_config_dword(pvt->pci_sad0, pvt->info.dram_rule[n_sads], in get_memory_layout()
1020 pci_read_config_dword(pvt->pci_sad0, pvt->info.interleave_list[n_sads], in get_memory_layout()
1022 sad_interl = sad_pkg(pvt->info.interleave_pkg, reg, 0); in get_memory_layout()
1024 u32 pkg = sad_pkg(pvt->info.interleave_pkg, reg, j); in get_memory_layout()
1038 pci_read_config_dword(pvt->pci_ha0, tad_dram_rule[n_tads], in get_memory_layout()
1063 if (!pvt->channel[i].dimms) in get_memory_layout()
1066 pci_read_config_dword(pvt->pci_tad[i], in get_memory_layout()
1083 if (!pvt->channel[i].dimms) in get_memory_layout()
1086 pci_read_config_dword(pvt->pci_tad[i], in get_memory_layout()
1093 tmp_mb = pvt->info.rir_limit(reg) >> 20; in get_memory_layout()
1104 pci_read_config_dword(pvt->pci_tad[i], in get_memory_layout()
1107 tmp_mb = RIR_OFFSET(pvt->info.type, reg) << 6; in get_memory_layout()
1114 (u32)RIR_RNK_TGT(pvt->info.type, reg), in get_memory_layout()
1140 struct sbridge_pvt *pvt = mci->pvt_info; in get_memory_error_data() local
1145 unsigned sad_interleave[pvt->info.max_interleave]; in get_memory_error_data()
1161 if ((addr > (u64) pvt->tolm) && (addr < (1LL << 32))) { in get_memory_error_data()
1165 if (addr >= (u64)pvt->tohm) { in get_memory_error_data()
1173 for (n_sads = 0; n_sads < pvt->info.max_sad; n_sads++) { in get_memory_error_data()
1174 pci_read_config_dword(pvt->pci_sad0, pvt->info.dram_rule[n_sads], in get_memory_error_data()
1189 if (n_sads == pvt->info.max_sad) { in get_memory_error_data()
1197 pci_read_config_dword(pvt->pci_sad0, pvt->info.interleave_list[n_sads], in get_memory_error_data()
1200 if (pvt->info.type == SANDY_BRIDGE) { in get_memory_error_data()
1201 sad_interl = sad_pkg(pvt->info.interleave_pkg, reg, 0); in get_memory_error_data()
1203 u32 pkg = sad_pkg(pvt->info.interleave_pkg, reg, sad_way); in get_memory_error_data()
1211 pvt->sbridge_dev->mc, in get_memory_error_data()
1240 } else if (pvt->info.type == HASWELL || pvt->info.type == BROADWELL) { in get_memory_error_data()
1257 pkg = sad_pkg(pvt->info.interleave_pkg, reg, idx); in get_memory_error_data()
1263 pci_read_config_dword(pvt->pci_ha0, in get_memory_error_data()
1273 pkg = sad_pkg(pvt->info.interleave_pkg, reg, idx); in get_memory_error_data()
1291 pvt = mci->pvt_info; in get_memory_error_data()
1297 if (pvt->info.type == SANDY_BRIDGE) in get_memory_error_data()
1298 pci_ha = pvt->pci_ha0; in get_memory_error_data()
1301 pci_ha = pvt->pci_ha1; in get_memory_error_data()
1303 pci_ha = pvt->pci_ha0; in get_memory_error_data()
1352 pci_read_config_dword(pvt->pci_tad[base_ch], in get_memory_error_data()
1356 if (pvt->is_mirrored) { in get_memory_error_data()
1370 if (pvt->is_lockstep) in get_memory_error_data()
1405 pci_read_config_dword(pvt->pci_tad[base_ch], in get_memory_error_data()
1412 limit = pvt->info.rir_limit(reg); in get_memory_error_data()
1429 if (pvt->is_close_pg) in get_memory_error_data()
1435 pci_read_config_dword(pvt->pci_tad[base_ch], in get_memory_error_data()
1438 *rank = RIR_RNK_TGT(pvt->info.type, reg); in get_memory_error_data()
1606 struct sbridge_pvt *pvt = mci->pvt_info; in sbridge_mci_bind_devs() local
1618 pvt->pci_sad0 = pdev; in sbridge_mci_bind_devs()
1621 pvt->pci_sad1 = pdev; in sbridge_mci_bind_devs()
1624 pvt->pci_br0 = pdev; in sbridge_mci_bind_devs()
1627 pvt->pci_ha0 = pdev; in sbridge_mci_bind_devs()
1630 pvt->pci_ta = pdev; in sbridge_mci_bind_devs()
1633 pvt->pci_ras = pdev; in sbridge_mci_bind_devs()
1641 pvt->pci_tad[id] = pdev; in sbridge_mci_bind_devs()
1646 pvt->pci_ddrio = pdev; in sbridge_mci_bind_devs()
1659 if (!pvt->pci_sad0 || !pvt->pci_sad1 || !pvt->pci_ha0 || in sbridge_mci_bind_devs()
1660 !pvt-> pci_tad || !pvt->pci_ras || !pvt->pci_ta) in sbridge_mci_bind_devs()
1680 struct sbridge_pvt *pvt = mci->pvt_info; in ibridge_mci_bind_devs() local
1699 pvt->pci_ha0 = pdev; in ibridge_mci_bind_devs()
1702 pvt->pci_ta = pdev; in ibridge_mci_bind_devs()
1704 pvt->pci_ras = pdev; in ibridge_mci_bind_devs()
1717 pvt->pci_tad[id] = pdev; in ibridge_mci_bind_devs()
1721 pvt->pci_ddrio = pdev; in ibridge_mci_bind_devs()
1725 pvt->pci_ddrio = pdev; in ibridge_mci_bind_devs()
1728 pvt->pci_sad0 = pdev; in ibridge_mci_bind_devs()
1731 pvt->pci_br0 = pdev; in ibridge_mci_bind_devs()
1734 pvt->pci_br1 = pdev; in ibridge_mci_bind_devs()
1737 pvt->pci_ha1 = pdev; in ibridge_mci_bind_devs()
1747 pvt->pci_tad[id] = pdev; in ibridge_mci_bind_devs()
1761 if (!pvt->pci_sad0 || !pvt->pci_ha0 || !pvt->pci_br0 || in ibridge_mci_bind_devs()
1762 !pvt->pci_br1 || !pvt->pci_tad || !pvt->pci_ras || in ibridge_mci_bind_devs()
1763 !pvt->pci_ta) in ibridge_mci_bind_devs()
1767 if (!pvt->pci_tad[i]) in ibridge_mci_bind_devs()
1786 struct sbridge_pvt *pvt = mci->pvt_info; in haswell_mci_bind_devs() local
1799 if (pvt->info.pci_vtd == NULL) in haswell_mci_bind_devs()
1801 pvt->info.pci_vtd = pci_get_device(PCI_VENDOR_ID_INTEL, in haswell_mci_bind_devs()
1812 pvt->pci_sad0 = pdev; in haswell_mci_bind_devs()
1815 pvt->pci_sad1 = pdev; in haswell_mci_bind_devs()
1818 pvt->pci_ha0 = pdev; in haswell_mci_bind_devs()
1821 pvt->pci_ta = pdev; in haswell_mci_bind_devs()
1824 pvt->pci_ras = pdev; in haswell_mci_bind_devs()
1827 pvt->pci_tad[0] = pdev; in haswell_mci_bind_devs()
1830 pvt->pci_tad[1] = pdev; in haswell_mci_bind_devs()
1834 pvt->pci_tad[2] = pdev; in haswell_mci_bind_devs()
1838 pvt->pci_tad[3] = pdev; in haswell_mci_bind_devs()
1841 pvt->pci_ddrio = pdev; in haswell_mci_bind_devs()
1844 pvt->pci_ha1 = pdev; in haswell_mci_bind_devs()
1847 pvt->pci_ha1_ta = pdev; in haswell_mci_bind_devs()
1851 pvt->pci_tad[2] = pdev; in haswell_mci_bind_devs()
1855 pvt->pci_tad[3] = pdev; in haswell_mci_bind_devs()
1868 if (!pvt->pci_sad0 || !pvt->pci_ha0 || !pvt->pci_sad1 || in haswell_mci_bind_devs()
1869 !pvt->pci_ras || !pvt->pci_ta || !pvt->info.pci_vtd) in haswell_mci_bind_devs()
1873 if (!pvt->pci_tad[i]) in haswell_mci_bind_devs()
1886 struct sbridge_pvt *pvt = mci->pvt_info; in broadwell_mci_bind_devs() local
1891 if (pvt->info.pci_vtd == NULL) in broadwell_mci_bind_devs()
1893 pvt->info.pci_vtd = pci_get_device(PCI_VENDOR_ID_INTEL, in broadwell_mci_bind_devs()
1904 pvt->pci_sad0 = pdev; in broadwell_mci_bind_devs()
1907 pvt->pci_sad1 = pdev; in broadwell_mci_bind_devs()
1910 pvt->pci_ha0 = pdev; in broadwell_mci_bind_devs()
1913 pvt->pci_ta = pdev; in broadwell_mci_bind_devs()
1916 pvt->pci_ras = pdev; in broadwell_mci_bind_devs()
1919 pvt->pci_tad[0] = pdev; in broadwell_mci_bind_devs()
1922 pvt->pci_tad[1] = pdev; in broadwell_mci_bind_devs()
1925 pvt->pci_tad[2] = pdev; in broadwell_mci_bind_devs()
1928 pvt->pci_tad[3] = pdev; in broadwell_mci_bind_devs()
1931 pvt->pci_ddrio = pdev; in broadwell_mci_bind_devs()
1944 if (!pvt->pci_sad0 || !pvt->pci_ha0 || !pvt->pci_sad1 || in broadwell_mci_bind_devs()
1945 !pvt->pci_ras || !pvt->pci_ta || !pvt->info.pci_vtd) in broadwell_mci_bind_devs()
1949 if (!pvt->pci_tad[i]) in broadwell_mci_bind_devs()
1973 struct sbridge_pvt *pvt = mci->pvt_info; in sbridge_mce_output_error() local
1990 if (pvt->info.type == IVY_BRIDGE) in sbridge_mce_output_error()
2058 pvt = mci->pvt_info; in sbridge_mce_output_error()
2076 if (!pvt->is_lockstep && !pvt->is_mirrored && !pvt->is_close_pg) in sbridge_mce_output_error()
2115 struct sbridge_pvt *pvt = mci->pvt_info; in sbridge_check_error() local
2126 count = (pvt->mce_out + MCE_LOG_LEN - pvt->mce_in) in sbridge_check_error()
2131 m = pvt->mce_outentry; in sbridge_check_error()
2132 if (pvt->mce_in + count > MCE_LOG_LEN) { in sbridge_check_error()
2133 unsigned l = MCE_LOG_LEN - pvt->mce_in; in sbridge_check_error()
2135 memcpy(m, &pvt->mce_entry[pvt->mce_in], sizeof(*m) * l); in sbridge_check_error()
2137 pvt->mce_in = 0; in sbridge_check_error()
2141 memcpy(m, &pvt->mce_entry[pvt->mce_in], sizeof(*m) * count); in sbridge_check_error()
2143 pvt->mce_in += count; in sbridge_check_error()
2146 if (pvt->mce_overrun) { in sbridge_check_error()
2148 pvt->mce_overrun); in sbridge_check_error()
2150 pvt->mce_overrun = 0; in sbridge_check_error()
2157 sbridge_mce_output_error(mci, &pvt->mce_outentry[i]); in sbridge_check_error()
2173 struct sbridge_pvt *pvt; in sbridge_mce_check_error() local
2182 pvt = mci->pvt_info; in sbridge_mce_check_error()
2212 if ((pvt->mce_out + 1) % MCE_LOG_LEN == pvt->mce_in) { in sbridge_mce_check_error()
2214 pvt->mce_overrun++; in sbridge_mce_check_error()
2219 memcpy(&pvt->mce_entry[pvt->mce_out], mce, sizeof(*mce)); in sbridge_mce_check_error()
2221 pvt->mce_out = (pvt->mce_out + 1) % MCE_LOG_LEN; in sbridge_mce_check_error()
2242 struct sbridge_pvt *pvt; in sbridge_unregister_mci() local
2251 pvt = mci->pvt_info; in sbridge_unregister_mci()
2269 struct sbridge_pvt *pvt; in sbridge_register_mci() local
2286 sizeof(*pvt)); in sbridge_register_mci()
2294 pvt = mci->pvt_info; in sbridge_register_mci()
2295 memset(pvt, 0, sizeof(*pvt)); in sbridge_register_mci()
2298 pvt->sbridge_dev = sbridge_dev; in sbridge_register_mci()
2312 pvt->info.type = type; in sbridge_register_mci()
2315 pvt->info.rankcfgr = IB_RANK_CFG_A; in sbridge_register_mci()
2316 pvt->info.get_tolm = ibridge_get_tolm; in sbridge_register_mci()
2317 pvt->info.get_tohm = ibridge_get_tohm; in sbridge_register_mci()
2318 pvt->info.dram_rule = ibridge_dram_rule; in sbridge_register_mci()
2319 pvt->info.get_memory_type = get_memory_type; in sbridge_register_mci()
2320 pvt->info.get_node_id = get_node_id; in sbridge_register_mci()
2321 pvt->info.rir_limit = rir_limit; in sbridge_register_mci()
2322 pvt->info.max_sad = ARRAY_SIZE(ibridge_dram_rule); in sbridge_register_mci()
2323 pvt->info.interleave_list = ibridge_interleave_list; in sbridge_register_mci()
2324 pvt->info.max_interleave = ARRAY_SIZE(ibridge_interleave_list); in sbridge_register_mci()
2325 pvt->info.interleave_pkg = ibridge_interleave_pkg; in sbridge_register_mci()
2334 pvt->info.rankcfgr = SB_RANK_CFG_A; in sbridge_register_mci()
2335 pvt->info.get_tolm = sbridge_get_tolm; in sbridge_register_mci()
2336 pvt->info.get_tohm = sbridge_get_tohm; in sbridge_register_mci()
2337 pvt->info.dram_rule = sbridge_dram_rule; in sbridge_register_mci()
2338 pvt->info.get_memory_type = get_memory_type; in sbridge_register_mci()
2339 pvt->info.get_node_id = get_node_id; in sbridge_register_mci()
2340 pvt->info.rir_limit = rir_limit; in sbridge_register_mci()
2341 pvt->info.max_sad = ARRAY_SIZE(sbridge_dram_rule); in sbridge_register_mci()
2342 pvt->info.interleave_list = sbridge_interleave_list; in sbridge_register_mci()
2343 pvt->info.max_interleave = ARRAY_SIZE(sbridge_interleave_list); in sbridge_register_mci()
2344 pvt->info.interleave_pkg = sbridge_interleave_pkg; in sbridge_register_mci()
2354 pvt->info.get_tolm = haswell_get_tolm; in sbridge_register_mci()
2355 pvt->info.get_tohm = haswell_get_tohm; in sbridge_register_mci()
2356 pvt->info.dram_rule = ibridge_dram_rule; in sbridge_register_mci()
2357 pvt->info.get_memory_type = haswell_get_memory_type; in sbridge_register_mci()
2358 pvt->info.get_node_id = haswell_get_node_id; in sbridge_register_mci()
2359 pvt->info.rir_limit = haswell_rir_limit; in sbridge_register_mci()
2360 pvt->info.max_sad = ARRAY_SIZE(ibridge_dram_rule); in sbridge_register_mci()
2361 pvt->info.interleave_list = ibridge_interleave_list; in sbridge_register_mci()
2362 pvt->info.max_interleave = ARRAY_SIZE(ibridge_interleave_list); in sbridge_register_mci()
2363 pvt->info.interleave_pkg = ibridge_interleave_pkg; in sbridge_register_mci()
2373 pvt->info.get_tolm = haswell_get_tolm; in sbridge_register_mci()
2374 pvt->info.get_tohm = haswell_get_tohm; in sbridge_register_mci()
2375 pvt->info.dram_rule = ibridge_dram_rule; in sbridge_register_mci()
2376 pvt->info.get_memory_type = haswell_get_memory_type; in sbridge_register_mci()
2377 pvt->info.get_node_id = haswell_get_node_id; in sbridge_register_mci()
2378 pvt->info.rir_limit = haswell_rir_limit; in sbridge_register_mci()
2379 pvt->info.max_sad = ARRAY_SIZE(ibridge_dram_rule); in sbridge_register_mci()
2380 pvt->info.interleave_list = ibridge_interleave_list; in sbridge_register_mci()
2381 pvt->info.max_interleave = ARRAY_SIZE(ibridge_interleave_list); in sbridge_register_mci()
2382 pvt->info.interleave_pkg = ibridge_interleave_pkg; in sbridge_register_mci()