1275 	void __iomem *chanbase = chan_base(d40c);  in d40_chan_has_events()  local
1278 	val = readl(chanbase + D40_CHAN_REG_SSLNK);  in d40_chan_has_events()
1279 	val |= readl(chanbase + D40_CHAN_REG_SDLNK);  in d40_chan_has_events()
1387 		void __iomem *chanbase = chan_base(d40c);  in d40_config_write()  local
1390 		writel(d40c->src_def_cfg, chanbase + D40_CHAN_REG_SSCFG);  in d40_config_write()
1391 		writel(d40c->dst_def_cfg, chanbase + D40_CHAN_REG_SDCFG);  in d40_config_write()
1394 		writel(lidx, chanbase + D40_CHAN_REG_SSELT);  in d40_config_write()
1395 		writel(lidx, chanbase + D40_CHAN_REG_SDELT);  in d40_config_write()
1398 		writel(0, chanbase + D40_CHAN_REG_SSLNK);  in d40_config_write()
1399 		writel(0, chanbase + D40_CHAN_REG_SDLNK);  in d40_config_write()
2077 	void __iomem *chanbase = chan_base(d40c);  in d40_is_paused()  local
2103 		status = readl(chanbase + D40_CHAN_REG_SDLNK);  in d40_is_paused()
2105 		status = readl(chanbase + D40_CHAN_REG_SSLNK);  in d40_is_paused()