127 		int src_cnt, u32 addr);
193 			     unsigned int src_cnt)  in prep_dma_xor_dbg()  argument
198 	for (i = 0; i < src_cnt; i++)  in prep_dma_xor_dbg()
204 			    unsigned int src_cnt)  in prep_dma_pq_dbg()  argument
209 	for (i = 0; i < src_cnt; i++)  in prep_dma_pq_dbg()
217 				    unsigned int src_cnt,  in prep_dma_pqzero_sum_dbg()  argument
224 		for (i = 0; i < src_cnt; i++)  in prep_dma_pqzero_sum_dbg()
227 		for (i = 0; i < src_cnt; i++)  in prep_dma_pqzero_sum_dbg()
233 		pr_debug("\t0x%016llx ", src[src_cnt + i]);  in prep_dma_pqzero_sum_dbg()
276 	desc->src_cnt = 0;  in ppc440spe_desc_init_null_xor()
284 					 int src_cnt, unsigned long flags)  in ppc440spe_desc_init_xor()  argument
290 	desc->src_cnt = src_cnt;  in ppc440spe_desc_init_xor()
293 	hw_desc->cbc = XOR_CBCR_TGT_BIT | src_cnt;  in ppc440spe_desc_init_xor()
304 		int dst_cnt, int src_cnt, unsigned long flags)  in ppc440spe_desc_init_dma2pq()  argument
310 	desc->src_cnt = src_cnt;  in ppc440spe_desc_init_dma2pq()
330 				int dst_cnt, int src_cnt, unsigned long flags,  in ppc440spe_desc_init_dma01pq()  argument
339 	desc->src_cnt = src_cnt;  in ppc440spe_desc_init_dma01pq()
444 				int dst_cnt, int src_cnt)  in ppc440spe_desc_init_dma01pqzero_sum()  argument
470 		iter->src_cnt = 0;  in ppc440spe_desc_init_dma01pqzero_sum()
478 		if (i++ < src_cnt)  in ppc440spe_desc_init_dma01pqzero_sum()
506 	desc->src_cnt = src_cnt;  in ppc440spe_desc_init_dma01pqzero_sum()
520 	desc->src_cnt = 1;  in ppc440spe_desc_init_memcpy()
805 static int ppc440spe_chan_xor_slot_count(size_t len, int src_cnt,  in ppc440spe_chan_xor_slot_count()  argument
811 	slot_cnt = *slots_per_op = (src_cnt + XOR_MAX_OPS - 1)/XOR_MAX_OPS;  in ppc440spe_chan_xor_slot_count()
827 		int src_cnt, size_t len)  in ppc440spe_dma2_pq_slot_count()  argument
833 	for (i = 1; i < src_cnt; i++) {  in ppc440spe_dma2_pq_slot_count()
842 				if (i == src_cnt-1)  in ppc440spe_dma2_pq_slot_count()
848 				if (i == src_cnt-1)  in ppc440spe_dma2_pq_slot_count()
855 			if (i == src_cnt-2 || (order == -1  in ppc440spe_dma2_pq_slot_count()
862 				if (i == src_cnt-1)  in ppc440spe_dma2_pq_slot_count()
866 				if (i == src_cnt-1)  in ppc440spe_dma2_pq_slot_count()
870 				if (i == src_cnt-1)  in ppc440spe_dma2_pq_slot_count()
887 	if (src_cnt <= 1 || (state != 1 && state != 2)) {  in ppc440spe_dma2_pq_slot_count()
889 			__func__, src_cnt, state, addr_count, order);  in ppc440spe_dma2_pq_slot_count()
890 		for (i = 0; i < src_cnt; i++)  in ppc440spe_dma2_pq_slot_count()
1265 static int ppc440spe_can_rxor(struct page **srcs, int src_cnt, size_t len)  in ppc440spe_can_rxor()  argument
1270 	if (unlikely(!(src_cnt > 1)))  in ppc440spe_can_rxor()
1273 	BUG_ON(src_cnt > ARRAY_SIZE(ppc440spe_rxor_srcs));  in ppc440spe_can_rxor()
1276 	for (i = 0; i < src_cnt; i++) {  in ppc440spe_can_rxor()
1281 	src_cnt = idx;  in ppc440spe_can_rxor()
1283 	for (i = 1; i < src_cnt; i++) {  in ppc440spe_can_rxor()
1301 			if ((i == src_cnt - 2) ||  in ppc440spe_can_rxor()
1342 	struct page **src_lst, int src_cnt, size_t src_sz)  in ppc440spe_adma_estimate()  argument
1365 		if (dst_cnt == 1 && src_cnt == 2 && dst_lst[0] == src_lst[1])  in ppc440spe_adma_estimate()
1367 		else if (ppc440spe_can_rxor(src_lst, src_cnt, src_sz))  in ppc440spe_adma_estimate()
1384 	int src_cnt, size_t src_sz)  in ppc440spe_async_tx_find_best_channel()  argument
1400 			if (src_cnt == 1 && dst_lst[1] == src_lst[0])  in ppc440spe_async_tx_find_best_channel()
1402 			if (src_cnt == 2 && dst_lst[1] == src_lst[1])  in ppc440spe_async_tx_find_best_channel()
1418 					dst_cnt, src_lst, src_cnt, src_sz);  in ppc440spe_async_tx_find_best_channel()
1440 	if (entry_idx < 0 || entry_idx >= (tdesc->src_cnt + tdesc->dst_cnt)) {  in ppc440spe_get_group_entry()
1442 			__func__, entry_idx, tdesc->src_cnt, tdesc->dst_cnt);  in ppc440spe_get_group_entry()
2035 		dma_addr_t *dma_src, u32 src_cnt, size_t len,  in ppc440spe_adma_prep_dma_xor()  argument
2045 				     dma_dest, dma_src, src_cnt));  in ppc440spe_adma_prep_dma_xor()
2052 		ppc440spe_chan->device->id, __func__, src_cnt, len,  in ppc440spe_adma_prep_dma_xor()
2056 	slot_cnt = ppc440spe_chan_xor_slot_count(len, src_cnt, &slots_per_op);  in ppc440spe_adma_prep_dma_xor()
2061 		ppc440spe_desc_init_xor(group_start, src_cnt, flags);  in ppc440spe_adma_prep_dma_xor()
2063 		while (src_cnt--)  in ppc440spe_adma_prep_dma_xor()
2065 				dma_src[src_cnt], src_cnt);  in ppc440spe_adma_prep_dma_xor()
2077 				int src_cnt);
2085 		dma_addr_t *src, int src_cnt)  in ppc440spe_adma_init_dma2rxor_slot()  argument
2090 	for (i = 0; i < src_cnt; i++) {  in ppc440spe_adma_init_dma2rxor_slot()
2092 						 desc->src_cnt, (u32)src[i]);  in ppc440spe_adma_init_dma2rxor_slot()
2102 		dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,  in ppc440spe_dma01_prep_mult()  argument
2123 		sw_desc->src_cnt = src_cnt;  in ppc440spe_dma01_prep_mult()
2188 		dma_addr_t *dst, dma_addr_t *src, int src_cnt,  in ppc440spe_dma01_prep_sum_product()  argument
2209 		sw_desc->src_cnt = src_cnt;  in ppc440spe_dma01_prep_sum_product()
2292 		dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,  in ppc440spe_dma01_prep_pq()  argument
2301 		 __func__, dst_cnt, src_cnt, len);  in ppc440spe_dma01_prep_pq()
2314 		if (src_cnt > 1 &&  in ppc440spe_dma01_prep_pq()
2319 			if (src_cnt != 2) {  in ppc440spe_dma01_prep_pq()
2359 		slot_cnt = src_cnt;  in ppc440spe_dma01_prep_pq()
2382 			slot_cnt += src_cnt - 2;  in ppc440spe_dma01_prep_pq()
2384 			slot_cnt += src_cnt - 3;  in ppc440spe_dma01_prep_pq()
2398 		ppc440spe_desc_init_dma01pq(sw_desc, dst_cnt, src_cnt,  in ppc440spe_dma01_prep_pq()
2405 		while (src_cnt--) {  in ppc440spe_dma01_prep_pq()
2406 			ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt],  in ppc440spe_dma01_prep_pq()
2407 						  src_cnt);  in ppc440spe_dma01_prep_pq()
2416 				mult = scf[src_cnt];  in ppc440spe_dma01_prep_pq()
2418 				mult, src_cnt,  dst_cnt - 1);  in ppc440spe_dma01_prep_pq()
2437 		dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,  in ppc440spe_dma2_prep_pq()  argument
2450 	descs_per_op = ppc440spe_dma2_pq_slot_count(src, src_cnt, len);  in ppc440spe_dma2_prep_pq()
2464 			ppc440spe_desc_init_dma2pq(iter, dst_cnt, src_cnt,  in ppc440spe_dma2_prep_pq()
2479 								  src_cnt);  in ppc440spe_dma2_prep_pq()
2504 		while (src_cnt--) {  in ppc440spe_dma2_prep_pq()
2508 			ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt],  in ppc440spe_dma2_prep_pq()
2509 						  src_cnt);  in ppc440spe_dma2_prep_pq()
2511 				mult = scf[src_cnt];  in ppc440spe_dma2_prep_pq()
2513 					mult, src_cnt, dst_cnt - 1);  in ppc440spe_dma2_prep_pq()
2526 		unsigned int src_cnt, const unsigned char *scf,  in ppc440spe_adma_prep_dma_pq()  argument
2536 				    dst, src, src_cnt));  in ppc440spe_adma_prep_dma_pq()
2539 	BUG_ON(!src_cnt);  in ppc440spe_adma_prep_dma_pq()
2541 	if (src_cnt == 1 && dst[1] == src[0]) {  in ppc440spe_adma_prep_dma_pq()
2549 				dest, 2, src, src_cnt, scf, len, flags);  in ppc440spe_adma_prep_dma_pq()
2553 	if (src_cnt == 2 && dst[1] == src[1]) {  in ppc440spe_adma_prep_dma_pq()
2575 		ppc440spe_chan->device->id, __func__, src_cnt, len,  in ppc440spe_adma_prep_dma_pq()
2582 				dst, dst_cnt, src, src_cnt, scf,  in ppc440spe_adma_prep_dma_pq()
2588 				dst, dst_cnt, src, src_cnt, scf,  in ppc440spe_adma_prep_dma_pq()
2602 		unsigned int src_cnt, const unsigned char *scf, size_t len,  in ppc440spe_adma_prep_dma_pqzero_sum()  argument
2623 					    src, src_cnt, scf));  in ppc440spe_adma_prep_dma_pqzero_sum()
2633 	slot_cnt = src_cnt + dst_cnt * 2;  in ppc440spe_adma_prep_dma_pqzero_sum()
2640 		ppc440spe_desc_init_dma01pqzero_sum(sw_desc, dst_cnt, src_cnt);  in ppc440spe_adma_prep_dma_pqzero_sum()
2662 			iter->src_cnt = 0;  in ppc440spe_adma_prep_dma_pqzero_sum()
2694 			iter->src_cnt = 0;  in ppc440spe_adma_prep_dma_pqzero_sum()
2758 						    src[src_cnt - 1]);  in ppc440spe_adma_prep_dma_pqzero_sum()
2765 							    scf[src_cnt - 1]);  in ppc440spe_adma_prep_dma_pqzero_sum()
2767 			if (!(--src_cnt))  in ppc440spe_adma_prep_dma_pqzero_sum()
2780 		struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt,  in ppc440spe_adma_prep_dma_xor_zero_sum()  argument
2792 						src_cnt - 1, 0, len,  in ppc440spe_adma_prep_dma_xor_zero_sum()
3102 			int src_cnt)  in ppc440spe_desc_set_xor_src_cnt()  argument
3107 	hw_desc->cbc |= src_cnt;  in ppc440spe_desc_set_xor_src_cnt()
3240 		struct ppc440spe_rxor *cursor, int index, int src_cnt)  in ppc440spe_adma_dma2rxor_inc_addr()  argument
3243 	if (index == src_cnt - 1) {  in ppc440spe_adma_dma2rxor_inc_addr()
3258 		int src_cnt, u32 addr)  in ppc440spe_adma_dma2rxor_prep_src()  argument
3277 			if (index == src_cnt-1) {  in ppc440spe_adma_dma2rxor_prep_src()
3282 					desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3289 			if (index == src_cnt-1) {  in ppc440spe_adma_dma2rxor_prep_src()
3294 					desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3306 		if (index == src_cnt-2 || (sign == -1  in ppc440spe_adma_dma2rxor_prep_src()
3315 				desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3322 			if (index == src_cnt-1) {  in ppc440spe_adma_dma2rxor_prep_src()
3324 					desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3332 			if (index == src_cnt-1) {  in ppc440spe_adma_dma2rxor_prep_src()
3334 					desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3342 			if (index == src_cnt-1) {  in ppc440spe_adma_dma2rxor_prep_src()
3344 					desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3354 				desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3363 				desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()