1215 #define IOAT_NUM_SRC_TEST 6 /* must be <= 8 */  macro
1220 	struct page *xor_srcs[IOAT_NUM_SRC_TEST];  in ioat_xor_val_self_test()
1221 	struct page *xor_val_srcs[IOAT_NUM_SRC_TEST + 1];  in ioat_xor_val_self_test()
1222 	dma_addr_t dma_srcs[IOAT_NUM_SRC_TEST + 1];  in ioat_xor_val_self_test()
1242 	for (src_idx = 0; src_idx < IOAT_NUM_SRC_TEST; src_idx++) {  in ioat_xor_val_self_test()
1259 	for (src_idx = 0; src_idx < IOAT_NUM_SRC_TEST; src_idx++) {  in ioat_xor_val_self_test()
1265 	for (src_idx = 0; src_idx < IOAT_NUM_SRC_TEST; src_idx++)  in ioat_xor_val_self_test()
1287 	for (i = 0; i < IOAT_NUM_SRC_TEST; i++)  in ioat_xor_val_self_test()
1289 	for (i = 0; i < IOAT_NUM_SRC_TEST; i++) {  in ioat_xor_val_self_test()
1296 				      IOAT_NUM_SRC_TEST, PAGE_SIZE,  in ioat_xor_val_self_test()
1326 	for (i = 0; i < IOAT_NUM_SRC_TEST; i++)  in ioat_xor_val_self_test()
1349 	for (i = 0; i < IOAT_NUM_SRC_TEST; i++)  in ioat_xor_val_self_test()
1355 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)  in ioat_xor_val_self_test()
1357 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++) {  in ioat_xor_val_self_test()
1364 					  IOAT_NUM_SRC_TEST + 1, PAGE_SIZE,  in ioat_xor_val_self_test()
1393 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)  in ioat_xor_val_self_test()
1408 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)  in ioat_xor_val_self_test()
1410 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++) {  in ioat_xor_val_self_test()
1417 					  IOAT_NUM_SRC_TEST + 1, PAGE_SIZE,  in ioat_xor_val_self_test()
1452 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)  in ioat_xor_val_self_test()
1461 		for (i = 0; i < IOAT_NUM_SRC_TEST; i++)  in ioat_xor_val_self_test()
1466 		for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)  in ioat_xor_val_self_test()
1474 	src_idx = IOAT_NUM_SRC_TEST;  in ioat_xor_val_self_test()