63 	intrctrl = readb(instance->reg_base + IOAT_INTRCTRL_OFFSET);  in ioat_dma_do_interrupt()
69 		writeb(intrctrl, instance->reg_base + IOAT_INTRCTRL_OFFSET);  in ioat_dma_do_interrupt()
73 	attnstatus = readl(instance->reg_base + IOAT_ATTNSTATUS_OFFSET);  in ioat_dma_do_interrupt()
80 	writeb(intrctrl, instance->reg_base + IOAT_INTRCTRL_OFFSET);  in ioat_dma_do_interrupt()
107 	chan->reg_base = device->reg_base + (0x80 * (idx + 1));  in ioat_init_channel()
133 	dma->chancnt = readb(device->reg_base + IOAT_CHANCNT_OFFSET);  in ioat1_enumerate_channels()
140 	xfercap_scale = readb(device->reg_base + IOAT_XFERCAP_OFFSET);  in ioat1_enumerate_channels()
172 	void __iomem *reg_base = ioat->base.reg_base;  in __ioat1_dma_memcpy_issue_pending()  local
177 	writeb(IOAT_CHANCMD_APPEND, reg_base + IOAT1_CHANCMD_OFFSET);  in __ioat1_dma_memcpy_issue_pending()
198 	void __iomem *reg_base = chan->reg_base;  in ioat1_reset_channel()  local
202 	chanerr = readl(reg_base + IOAT_CHANERR_OFFSET);  in ioat1_reset_channel()
208 		writel(chanerr, reg_base + IOAT_CHANERR_OFFSET);  in ioat1_reset_channel()
221 	       reg_base + IOAT_CHANCMD_OFFSET(chan->device->version));  in ioat1_reset_channel()
321 	writew(IOAT_CHANCTRL_RUN, chan->reg_base + IOAT_CHANCTRL_OFFSET);  in ioat1_dma_alloc_chan_resources()
323 	chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET);  in ioat1_dma_alloc_chan_resources()
326 		writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET);  in ioat1_dma_alloc_chan_resources()
350 	       chan->reg_base + IOAT_CHANCMP_OFFSET_LOW);  in ioat1_dma_alloc_chan_resources()
352 	       chan->reg_base + IOAT_CHANCMP_OFFSET_HIGH);  in ioat1_dma_alloc_chan_resources()
421 	       chan->reg_base + IOAT_CHANCMD_OFFSET(chan->device->version));  in ioat1_dma_free_chan_resources()
565 	writew(IOAT_CHANCTRL_RUN, ioat->base.reg_base + IOAT_CHANCTRL_OFFSET);  in ioat1_cleanup_event()
580 		u32 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET);  in ioat_get_current_completion()
994 	writeb(intrctrl, device->reg_base + IOAT_INTRCTRL_OFFSET);  in ioat_dma_setup_interrupts()
999 	writeb(0, device->reg_base + IOAT_INTRCTRL_OFFSET);  in ioat_dma_setup_interrupts()
1009 	writeb(0, device->reg_base + IOAT_INTRCTRL_OFFSET);  in ioat_disable_interrupts()
1227 		device->dca = ioat_dca_init(pdev, device->reg_base);  in ioat1_dma_probe()