231 	u32 ch = fsl_chan->vchan.chan.chan_id;  in fsl_edma_enable_request()  local
233 	edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), addr + EDMA_SEEI);  in fsl_edma_enable_request()
234 	edma_writeb(fsl_chan->edma, ch, addr + EDMA_SERQ);  in fsl_edma_enable_request()
240 	u32 ch = fsl_chan->vchan.chan.chan_id;  in fsl_edma_disable_request()  local
242 	edma_writeb(fsl_chan->edma, ch, addr + EDMA_CERQ);  in fsl_edma_disable_request()
243 	edma_writeb(fsl_chan->edma, EDMA_CEEI_CEEI(ch), addr + EDMA_CEEI);  in fsl_edma_disable_request()
249 	u32 ch = fsl_chan->vchan.chan.chan_id;  in fsl_edma_chan_mux()  local
255 	muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];  in fsl_edma_chan_mux()
362 	u32 ch = fsl_chan->vchan.chan.chan_id;  in fsl_edma_desc_residue()  local
377 		cur_addr = edma_readl(fsl_chan->edma, addr + EDMA_TCD_SADDR(ch));  in fsl_edma_desc_residue()
379 		cur_addr = edma_readl(fsl_chan->edma, addr + EDMA_TCD_DADDR(ch));  in fsl_edma_desc_residue()
434 	u32 ch = fsl_chan->vchan.chan.chan_id;  in fsl_edma_set_tcd_regs()  local
441 	edma_writew(edma, 0, addr + EDMA_TCD_CSR(ch));  in fsl_edma_set_tcd_regs()
442 	edma_writel(edma, le32_to_cpu(tcd->saddr), addr + EDMA_TCD_SADDR(ch));  in fsl_edma_set_tcd_regs()
443 	edma_writel(edma, le32_to_cpu(tcd->daddr), addr + EDMA_TCD_DADDR(ch));  in fsl_edma_set_tcd_regs()
445 	edma_writew(edma, le16_to_cpu(tcd->attr), addr + EDMA_TCD_ATTR(ch));  in fsl_edma_set_tcd_regs()
446 	edma_writew(edma, le16_to_cpu(tcd->soff), addr + EDMA_TCD_SOFF(ch));  in fsl_edma_set_tcd_regs()
448 	edma_writel(edma, le32_to_cpu(tcd->nbytes), addr + EDMA_TCD_NBYTES(ch));  in fsl_edma_set_tcd_regs()
449 	edma_writel(edma, le32_to_cpu(tcd->slast), addr + EDMA_TCD_SLAST(ch));  in fsl_edma_set_tcd_regs()
451 	edma_writew(edma, le16_to_cpu(tcd->citer), addr + EDMA_TCD_CITER(ch));  in fsl_edma_set_tcd_regs()
452 	edma_writew(edma, le16_to_cpu(tcd->biter), addr + EDMA_TCD_BITER(ch));  in fsl_edma_set_tcd_regs()
453 	edma_writew(edma, le16_to_cpu(tcd->doff), addr + EDMA_TCD_DOFF(ch));  in fsl_edma_set_tcd_regs()
455 	edma_writel(edma, le32_to_cpu(tcd->dlast_sga), addr + EDMA_TCD_DLAST_SGA(ch));  in fsl_edma_set_tcd_regs()
457 	edma_writew(edma, le16_to_cpu(tcd->csr), addr + EDMA_TCD_CSR(ch));  in fsl_edma_set_tcd_regs()
656 	unsigned int intr, ch;  in fsl_edma_tx_handler()  local
666 	for (ch = 0; ch < fsl_edma->n_chans; ch++) {  in fsl_edma_tx_handler()
667 		if (intr & (0x1 << ch)) {  in fsl_edma_tx_handler()
668 			edma_writeb(fsl_edma, EDMA_CINT_CINT(ch),  in fsl_edma_tx_handler()
671 			fsl_chan = &fsl_edma->chans[ch];  in fsl_edma_tx_handler()
695 	unsigned int err, ch;  in fsl_edma_err_handler()  local
701 	for (ch = 0; ch < fsl_edma->n_chans; ch++) {  in fsl_edma_err_handler()
702 		if (err & (0x1 << ch)) {  in fsl_edma_err_handler()
703 			fsl_edma_disable_request(&fsl_edma->chans[ch]);  in fsl_edma_err_handler()
704 			edma_writeb(fsl_edma, EDMA_CERR_CERR(ch),  in fsl_edma_err_handler()
706 			fsl_edma->chans[ch].status = DMA_ERROR;  in fsl_edma_err_handler()