146 	channel_set_bit(dw, MASK.XFER, dwc->mask);  in dwc_initialize()
147 	channel_set_bit(dw, MASK.ERROR, dwc->mask);  in dwc_initialize()
580 	channel_set_bit(dw, MASK.BLOCK, dwc->mask);  in dwc_handle_cyclic()
612 	channel_set_bit(dw, MASK.XFER, dw->all_chan_mask);  in dw_dma_tasklet()
613 	channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask);  in dw_dma_tasklet()
631 	channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);  in dw_dma_interrupt()
632 	channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);  in dw_dma_interrupt()
633 	channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask);  in dw_dma_interrupt()
642 		channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1);  in dw_dma_interrupt()
643 		channel_clear_bit(dw, MASK.BLOCK, (1 << 8) - 1);  in dw_dma_interrupt()
644 		channel_clear_bit(dw, MASK.SRC_TRAN, (1 << 8) - 1);  in dw_dma_interrupt()
645 		channel_clear_bit(dw, MASK.DST_TRAN, (1 << 8) - 1);  in dw_dma_interrupt()
646 		channel_clear_bit(dw, MASK.ERROR, (1 << 8) - 1);  in dw_dma_interrupt()
1109 	channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);  in dw_dma_off()
1110 	channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);  in dw_dma_off()
1111 	channel_clear_bit(dw, MASK.SRC_TRAN, dw->all_chan_mask);  in dw_dma_off()
1112 	channel_clear_bit(dw, MASK.DST_TRAN, dw->all_chan_mask);  in dw_dma_off()
1113 	channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask);  in dw_dma_off()
1231 	channel_clear_bit(dw, MASK.XFER, dwc->mask);  in dwc_free_chan_resources()
1232 	channel_clear_bit(dw, MASK.BLOCK, dwc->mask);  in dwc_free_chan_resources()
1233 	channel_clear_bit(dw, MASK.ERROR, dwc->mask);  in dwc_free_chan_resources()
1273 	channel_set_bit(dw, MASK.BLOCK, dwc->mask);  in dw_dma_cyclic_start()