726 	struct dma_device *dd;  in jz4780_dma_probe()  local
771 	dd = &jzdma->dma_device;  in jz4780_dma_probe()
773 	dma_cap_set(DMA_MEMCPY, dd->cap_mask);  in jz4780_dma_probe()
774 	dma_cap_set(DMA_SLAVE, dd->cap_mask);  in jz4780_dma_probe()
775 	dma_cap_set(DMA_CYCLIC, dd->cap_mask);  in jz4780_dma_probe()
777 	dd->dev = dev;  in jz4780_dma_probe()
778 	dd->copy_align = 2; /* 2^2 = 4 byte alignment */  in jz4780_dma_probe()
779 	dd->device_alloc_chan_resources = jz4780_dma_alloc_chan_resources;  in jz4780_dma_probe()
780 	dd->device_free_chan_resources = jz4780_dma_free_chan_resources;  in jz4780_dma_probe()
781 	dd->device_prep_slave_sg = jz4780_dma_prep_slave_sg;  in jz4780_dma_probe()
782 	dd->device_prep_dma_cyclic = jz4780_dma_prep_dma_cyclic;  in jz4780_dma_probe()
783 	dd->device_prep_dma_memcpy = jz4780_dma_prep_dma_memcpy;  in jz4780_dma_probe()
784 	dd->device_config = jz4780_dma_slave_config;  in jz4780_dma_probe()
785 	dd->device_terminate_all = jz4780_dma_terminate_all;  in jz4780_dma_probe()
786 	dd->device_tx_status = jz4780_dma_tx_status;  in jz4780_dma_probe()
787 	dd->device_issue_pending = jz4780_dma_issue_pending;  in jz4780_dma_probe()
788 	dd->src_addr_widths = JZ_DMA_BUSWIDTHS;  in jz4780_dma_probe()
789 	dd->dst_addr_widths = JZ_DMA_BUSWIDTHS;  in jz4780_dma_probe()
790 	dd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);  in jz4780_dma_probe()
791 	dd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;  in jz4780_dma_probe()
803 	INIT_LIST_HEAD(&dd->channels);  in jz4780_dma_probe()
809 		vchan_init(&jzchan->vchan, dd);  in jz4780_dma_probe()
813 	ret = dma_async_device_register(dd);  in jz4780_dma_probe()
831 	dma_async_device_unregister(dd);  in jz4780_dma_probe()