151 	void __iomem *reg_config;  member
355 	val = readl(ch->reg_config);  in pl08x_phy_channel_busy()
385 	writel(ccfg, phychan->reg_config);  in pl08x_write_lli()
418 	val = readl(phychan->reg_config);  in pl08x_start_next_txd()
420 		val = readl(phychan->reg_config);  in pl08x_start_next_txd()
422 	writel(val | PL080_CONFIG_ENABLE, phychan->reg_config);  in pl08x_start_next_txd()
441 	val = readl(ch->reg_config);  in pl08x_pause_phy_chan()
443 	writel(val, ch->reg_config);  in pl08x_pause_phy_chan()
460 	val = readl(ch->reg_config);  in pl08x_resume_phy_chan()
462 	writel(val, ch->reg_config);  in pl08x_resume_phy_chan()
474 	u32 val = readl(ch->reg_config);  in pl08x_terminate_phy_chan()
479 	writel(val, ch->reg_config);  in pl08x_terminate_phy_chan()
2163 		ch->reg_config = ch->base + vd->config_offset;  in pl08x_probe()
2174 			val = readl(ch->reg_config);  in pl08x_probe()