Lines Matching refs:ATMEL_TC_REG
51 upper = __raw_readl(tcaddr + ATMEL_TC_REG(1, CV)); in tc_get_cycles()
52 lower = __raw_readl(tcaddr + ATMEL_TC_REG(0, CV)); in tc_get_cycles()
53 } while (upper != __raw_readl(tcaddr + ATMEL_TC_REG(1, CV))); in tc_get_cycles()
61 return __raw_readl(tcaddr + ATMEL_TC_REG(0, CV)); in tc_get_cycles32()
101 __raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR)); in tc_mode()
102 __raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR)); in tc_mode()
117 regs + ATMEL_TC_REG(2, CMR)); in tc_mode()
118 __raw_writel((32768 + HZ/2) / HZ, tcaddr + ATMEL_TC_REG(2, RC)); in tc_mode()
121 __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); in tc_mode()
125 regs + ATMEL_TC_REG(2, CCR)); in tc_mode()
134 regs + ATMEL_TC_REG(2, CMR)); in tc_mode()
135 __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); in tc_mode()
147 __raw_writel(delta, tcaddr + ATMEL_TC_REG(2, RC)); in tc_next_event()
151 tcaddr + ATMEL_TC_REG(2, CCR)); in tc_next_event()
172 sr = __raw_readl(dev->regs + ATMEL_TC_REG(2, SR)); in ch2_irq()
229 tcaddr + ATMEL_TC_REG(0, CMR)); in tcb_setup_dual_chan()
230 __raw_writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA)); in tcb_setup_dual_chan()
231 __raw_writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC)); in tcb_setup_dual_chan()
232 __raw_writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR)); /* no irqs */ in tcb_setup_dual_chan()
233 __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR)); in tcb_setup_dual_chan()
239 tcaddr + ATMEL_TC_REG(1, CMR)); in tcb_setup_dual_chan()
240 __raw_writel(0xff, tcaddr + ATMEL_TC_REG(1, IDR)); /* no irqs */ in tcb_setup_dual_chan()
241 __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(1, CCR)); in tcb_setup_dual_chan()
255 tcaddr + ATMEL_TC_REG(0, CMR)); in tcb_setup_single_chan()
256 __raw_writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR)); /* no irqs */ in tcb_setup_single_chan()
257 __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR)); in tcb_setup_single_chan()