42 static void __iomem *timer_base;  variable
53 	u32 old = readl(timer_base + TIMER_CNTVAL_REG(1));  in sun4i_clkevt_sync()
55 	while ((old - readl(timer_base + TIMER_CNTVAL_REG(1))) < TIMER_SYNC_TICKS)  in sun4i_clkevt_sync()
61 	u32 val = readl(timer_base + TIMER_CTL_REG(timer));  in sun4i_clkevt_time_stop()
62 	writel(val & ~TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG(timer));  in sun4i_clkevt_time_stop()
68 	writel(delay, timer_base + TIMER_INTVAL_REG(timer));  in sun4i_clkevt_time_setup()
73 	u32 val = readl(timer_base + TIMER_CTL_REG(timer));  in sun4i_clkevt_time_start()
81 	       timer_base + TIMER_CTL_REG(timer));  in sun4i_clkevt_time_start()
128 	writel(0x1, timer_base + TIMER_IRQ_ST_REG);  in sun4i_timer_interrupt()
143 	return ~readl(timer_base + TIMER_CNTVAL_REG(1));  in sun4i_timer_sched_read()
153 	timer_base = of_iomap(node, 0);  in sun4i_timer_init()
154 	if (!timer_base)  in sun4i_timer_init()
168 	writel(~0, timer_base + TIMER_INTVAL_REG(1));  in sun4i_timer_init()
171 	       timer_base + TIMER_CTL_REG(1));  in sun4i_timer_init()
182 	clocksource_mmio_init(timer_base + TIMER_CNTVAL_REG(1), node->name,  in sun4i_timer_init()
188 	       timer_base + TIMER_CTL_REG(0));  in sun4i_timer_init()
204 	val = readl(timer_base + TIMER_IRQ_EN_REG);  in sun4i_timer_init()
205 	writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG);  in sun4i_timer_init()