83 static struct samsung_pwm_clocksource pwm;  variable
96 	reg = readl(pwm.base + REG_TCFG0);  in samsung_timer_set_prescale()
99 	writel(reg, pwm.base + REG_TCFG0);  in samsung_timer_set_prescale()
111 	bits = (fls(divisor) - 1) - pwm.variant.div_base;  in samsung_timer_set_divisor()
115 	reg = readl(pwm.base + REG_TCFG1);  in samsung_timer_set_divisor()
118 	writel(reg, pwm.base + REG_TCFG1);  in samsung_timer_set_divisor()
133 	tcon = __raw_readl(pwm.base + REG_TCON);  in samsung_time_stop()
135 	__raw_writel(tcon, pwm.base + REG_TCON);  in samsung_time_stop()
151 	tcon = __raw_readl(pwm.base + REG_TCON);  in samsung_time_setup()
156 	__raw_writel(tcnt, pwm.base + REG_TCNTB(channel));  in samsung_time_setup()
157 	__raw_writel(tcnt, pwm.base + REG_TCMPB(channel));  in samsung_time_setup()
158 	__raw_writel(tcon, pwm.base + REG_TCON);  in samsung_time_setup()
173 	tcon = __raw_readl(pwm.base + REG_TCON);  in samsung_time_start()
183 	__raw_writel(tcon, pwm.base + REG_TCON);  in samsung_time_start()
204 	samsung_time_setup(pwm.event_id, cycles);  in samsung_set_next_event()
205 	samsung_time_start(pwm.event_id, false);  in samsung_set_next_event()
213 	samsung_time_stop(pwm.event_id);  in samsung_set_mode()
217 		samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1);  in samsung_set_mode()
218 		samsung_time_start(pwm.event_id, true);  in samsung_set_mode()
233 	samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div);  in samsung_clockevent_resume()
234 	samsung_timer_set_divisor(pwm.event_id, pwm.tdiv);  in samsung_clockevent_resume()
236 	if (pwm.variant.has_tint_cstat) {  in samsung_clockevent_resume()
237 		u32 mask = (1 << pwm.event_id);  in samsung_clockevent_resume()
238 		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);  in samsung_clockevent_resume()
255 	if (pwm.variant.has_tint_cstat) {  in samsung_clock_event_isr()
256 		u32 mask = (1 << pwm.event_id);  in samsung_clock_event_isr()
257 		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);  in samsung_clock_event_isr()
278 	pclk = clk_get_rate(pwm.timerclk);  in samsung_clockevent_init()
280 	samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div);  in samsung_clockevent_init()
281 	samsung_timer_set_divisor(pwm.event_id, pwm.tdiv);  in samsung_clockevent_init()
283 	clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv);  in samsung_clockevent_init()
284 	pwm.clock_count_per_tick = clock_rate / HZ;  in samsung_clockevent_init()
288 						clock_rate, 1, pwm.tcnt_max);  in samsung_clockevent_init()
290 	irq_number = pwm.irq[pwm.event_id];  in samsung_clockevent_init()
293 	if (pwm.variant.has_tint_cstat) {  in samsung_clockevent_init()
294 		u32 mask = (1 << pwm.event_id);  in samsung_clockevent_init()
295 		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);  in samsung_clockevent_init()
301 	samsung_time_stop(pwm.source_id);  in samsung_clocksource_suspend()
306 	samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div);  in samsung_clocksource_resume()
307 	samsung_timer_set_divisor(pwm.source_id, pwm.tdiv);  in samsung_clocksource_resume()
309 	samsung_time_setup(pwm.source_id, pwm.tcnt_max);  in samsung_clocksource_resume()
310 	samsung_time_start(pwm.source_id, true);  in samsung_clocksource_resume()
315 	return ~readl_relaxed(pwm.source_reg);  in samsung_clocksource_read()
345 	pclk = clk_get_rate(pwm.timerclk);  in samsung_clocksource_init()
347 	samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div);  in samsung_clocksource_init()
348 	samsung_timer_set_divisor(pwm.source_id, pwm.tdiv);  in samsung_clocksource_init()
350 	clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv);  in samsung_clocksource_init()
352 	samsung_time_setup(pwm.source_id, pwm.tcnt_max);  in samsung_clocksource_init()
353 	samsung_time_start(pwm.source_id, true);  in samsung_clocksource_init()
355 	if (pwm.source_id == 4)  in samsung_clocksource_init()
356 		pwm.source_reg = pwm.base + 0x40;  in samsung_clocksource_init()
358 		pwm.source_reg = pwm.base + pwm.source_id * 0x0c + 0x14;  in samsung_clocksource_init()
361 						pwm.variant.bits, clock_rate);  in samsung_clocksource_init()
363 	samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);  in samsung_clocksource_init()
371 	clk_prepare_enable(pwm.timerclk);  in samsung_timer_resources()
373 	pwm.tcnt_max = (1UL << pwm.variant.bits) - 1;  in samsung_timer_resources()
374 	if (pwm.variant.bits == 16) {  in samsung_timer_resources()
375 		pwm.tscaler_div = 25;  in samsung_timer_resources()
376 		pwm.tdiv = 2;  in samsung_timer_resources()
378 		pwm.tscaler_div = 2;  in samsung_timer_resources()
379 		pwm.tdiv = 1;  in samsung_timer_resources()
391 	mask = ~pwm.variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1);  in _samsung_pwm_clocksource_init()
395 	pwm.source_id = channel;  in _samsung_pwm_clocksource_init()
401 	pwm.event_id = channel;  in _samsung_pwm_clocksource_init()
411 	pwm.base = base;  in samsung_pwm_clocksource_init()
412 	memcpy(&pwm.variant, variant, sizeof(pwm.variant));  in samsung_pwm_clocksource_init()
413 	memcpy(pwm.irq, irqs, SAMSUNG_PWM_NUM * sizeof(*irqs));  in samsung_pwm_clocksource_init()
415 	pwm.timerclk = clk_get(NULL, "timers");  in samsung_pwm_clocksource_init()
416 	if (IS_ERR(pwm.timerclk))  in samsung_pwm_clocksource_init()
431 	memcpy(&pwm.variant, variant, sizeof(pwm.variant));  in samsung_pwm_alloc()
433 		pwm.irq[i] = irq_of_parse_and_map(np, i);  in samsung_pwm_alloc()
441 		pwm.variant.output_mask |= 1 << val;  in samsung_pwm_alloc()
444 	pwm.base = of_iomap(np, 0);  in samsung_pwm_alloc()
445 	if (!pwm.base) {  in samsung_pwm_alloc()
450 	pwm.timerclk = of_clk_get_by_name(np, "timers");  in samsung_pwm_alloc()
451 	if (IS_ERR(pwm.timerclk))  in samsung_pwm_alloc()