Lines Matching refs:clk_output_name
226 const char *clk_output_name[clk_max]; in zynq_clk_setup() local
238 i, &clk_output_name[i])) { in zynq_clk_setup()
243 cpu_parents[0] = clk_output_name[armpll]; in zynq_clk_setup()
244 cpu_parents[1] = clk_output_name[armpll]; in zynq_clk_setup()
245 cpu_parents[2] = clk_output_name[ddrpll]; in zynq_clk_setup()
246 cpu_parents[3] = clk_output_name[iopll]; in zynq_clk_setup()
247 periph_parents[0] = clk_output_name[iopll]; in zynq_clk_setup()
248 periph_parents[1] = clk_output_name[iopll]; in zynq_clk_setup()
249 periph_parents[2] = clk_output_name[armpll]; in zynq_clk_setup()
250 periph_parents[3] = clk_output_name[ddrpll]; in zynq_clk_setup()
266 clks[armpll] = clk_register_mux(NULL, clk_output_name[armpll], in zynq_clk_setup()
272 clks[ddrpll] = clk_register_mux(NULL, clk_output_name[ddrpll], in zynq_clk_setup()
278 clks[iopll] = clk_register_mux(NULL, clk_output_name[iopll], in zynq_clk_setup()
291 clks[cpu_6or4x] = clk_register_gate(NULL, clk_output_name[cpu_6or4x], in zynq_clk_setup()
297 clks[cpu_3or2x] = clk_register_gate(NULL, clk_output_name[cpu_3or2x], in zynq_clk_setup()
303 clks[cpu_2x] = clk_register_gate(NULL, clk_output_name[cpu_2x], in zynq_clk_setup()
310 clks[cpu_1x] = clk_register_gate(NULL, clk_output_name[cpu_1x], in zynq_clk_setup()
315 swdt_ext_clk_mux_parents[0] = clk_output_name[cpu_1x]; in zynq_clk_setup()
325 clks[swdt] = clk_register_mux(NULL, clk_output_name[swdt], in zynq_clk_setup()
334 clks[ddr2x] = clk_register_gate(NULL, clk_output_name[ddr2x], in zynq_clk_setup()
340 clks[ddr3x] = clk_register_gate(NULL, clk_output_name[ddr3x], in zynq_clk_setup()
351 clks[dci] = clk_register_gate(NULL, clk_output_name[dci], "dci_div1", in zynq_clk_setup()
359 zynq_clk_register_fclk(i, clk_output_name[i], in zynq_clk_setup()
364 zynq_clk_register_periph_clk(lqspi, 0, clk_output_name[lqspi], NULL, in zynq_clk_setup()
367 zynq_clk_register_periph_clk(smc, 0, clk_output_name[smc], NULL, in zynq_clk_setup()
370 zynq_clk_register_periph_clk(pcap, 0, clk_output_name[pcap], NULL, in zynq_clk_setup()
373 zynq_clk_register_periph_clk(sdio0, sdio1, clk_output_name[sdio0], in zynq_clk_setup()
374 clk_output_name[sdio1], SLCR_SDIO_CLK_CTRL, in zynq_clk_setup()
377 zynq_clk_register_periph_clk(uart0, uart1, clk_output_name[uart0], in zynq_clk_setup()
378 clk_output_name[uart1], SLCR_UART_CLK_CTRL, in zynq_clk_setup()
381 zynq_clk_register_periph_clk(spi0, spi1, clk_output_name[spi0], in zynq_clk_setup()
382 clk_output_name[spi1], SLCR_SPI_CLK_CTRL, in zynq_clk_setup()
406 clks[gem0] = clk_register_gate(NULL, clk_output_name[gem0], in zynq_clk_setup()
431 clks[gem1] = clk_register_gate(NULL, clk_output_name[gem1], in zynq_clk_setup()
473 clks[can0] = clk_register_mux(NULL, clk_output_name[can0], in zynq_clk_setup()
477 clks[can1] = clk_register_mux(NULL, clk_output_name[can1], in zynq_clk_setup()
498 clks[dbg_trc] = clk_register_gate(NULL, clk_output_name[dbg_trc], in zynq_clk_setup()
501 clks[dbg_apb] = clk_register_gate(NULL, clk_output_name[dbg_apb], in zynq_clk_setup()
502 clk_output_name[cpu_1x], 0, SLCR_DBG_CLK_CTRL, 1, 0, in zynq_clk_setup()
515 clks[dma] = clk_register_gate(NULL, clk_output_name[dma], in zynq_clk_setup()
516 clk_output_name[cpu_2x], 0, SLCR_APER_CLK_CTRL, 0, 0, in zynq_clk_setup()
518 clks[usb0_aper] = clk_register_gate(NULL, clk_output_name[usb0_aper], in zynq_clk_setup()
519 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 2, 0, in zynq_clk_setup()
521 clks[usb1_aper] = clk_register_gate(NULL, clk_output_name[usb1_aper], in zynq_clk_setup()
522 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 3, 0, in zynq_clk_setup()
524 clks[gem0_aper] = clk_register_gate(NULL, clk_output_name[gem0_aper], in zynq_clk_setup()
525 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 6, 0, in zynq_clk_setup()
527 clks[gem1_aper] = clk_register_gate(NULL, clk_output_name[gem1_aper], in zynq_clk_setup()
528 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 7, 0, in zynq_clk_setup()
530 clks[sdio0_aper] = clk_register_gate(NULL, clk_output_name[sdio0_aper], in zynq_clk_setup()
531 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 10, 0, in zynq_clk_setup()
533 clks[sdio1_aper] = clk_register_gate(NULL, clk_output_name[sdio1_aper], in zynq_clk_setup()
534 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 11, 0, in zynq_clk_setup()
536 clks[spi0_aper] = clk_register_gate(NULL, clk_output_name[spi0_aper], in zynq_clk_setup()
537 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 14, 0, in zynq_clk_setup()
539 clks[spi1_aper] = clk_register_gate(NULL, clk_output_name[spi1_aper], in zynq_clk_setup()
540 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 15, 0, in zynq_clk_setup()
542 clks[can0_aper] = clk_register_gate(NULL, clk_output_name[can0_aper], in zynq_clk_setup()
543 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 16, 0, in zynq_clk_setup()
545 clks[can1_aper] = clk_register_gate(NULL, clk_output_name[can1_aper], in zynq_clk_setup()
546 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 17, 0, in zynq_clk_setup()
548 clks[i2c0_aper] = clk_register_gate(NULL, clk_output_name[i2c0_aper], in zynq_clk_setup()
549 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 18, 0, in zynq_clk_setup()
551 clks[i2c1_aper] = clk_register_gate(NULL, clk_output_name[i2c1_aper], in zynq_clk_setup()
552 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 19, 0, in zynq_clk_setup()
554 clks[uart0_aper] = clk_register_gate(NULL, clk_output_name[uart0_aper], in zynq_clk_setup()
555 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 20, 0, in zynq_clk_setup()
557 clks[uart1_aper] = clk_register_gate(NULL, clk_output_name[uart1_aper], in zynq_clk_setup()
558 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 21, 0, in zynq_clk_setup()
560 clks[gpio_aper] = clk_register_gate(NULL, clk_output_name[gpio_aper], in zynq_clk_setup()
561 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 22, 0, in zynq_clk_setup()
563 clks[lqspi_aper] = clk_register_gate(NULL, clk_output_name[lqspi_aper], in zynq_clk_setup()
564 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 23, 0, in zynq_clk_setup()
566 clks[smc_aper] = clk_register_gate(NULL, clk_output_name[smc_aper], in zynq_clk_setup()
567 clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 24, 0, in zynq_clk_setup()