17 void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,  in u8540_clk_init()  argument
333 	clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", clkrst3_base,  in u8540_clk_init()
337 	clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", clkrst3_base,  in u8540_clk_init()
341 	clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", clkrst3_base,  in u8540_clk_init()
345 	clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", clkrst3_base,  in u8540_clk_init()
349 	clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", clkrst3_base,  in u8540_clk_init()
353 	clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", clkrst3_base,  in u8540_clk_init()
358 	clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", clkrst3_base,  in u8540_clk_init()
362 	clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", clkrst3_base,  in u8540_clk_init()
366 	clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", clkrst3_base,  in u8540_clk_init()
374 	clk = clk_reg_prcc_pclk("p3_pclk9", "per3clk", clkrst3_base,  in u8540_clk_init()
378 	clk = clk_reg_prcc_pclk("p3_pclk10", "per3clk", clkrst3_base,  in u8540_clk_init()
382 	clk = clk_reg_prcc_pclk("p3_pclk11", "per3clk", clkrst3_base,  in u8540_clk_init()
386 	clk = clk_reg_prcc_pclk("p3_pclk12", "per3clk", clkrst3_base,  in u8540_clk_init()
531 			clkrst3_base, BIT(1), CLK_SET_RATE_GATE);  in u8540_clk_init()
535 			clkrst3_base, BIT(2), CLK_SET_RATE_GATE);  in u8540_clk_init()
539 			clkrst3_base, BIT(3), CLK_SET_RATE_GATE);  in u8540_clk_init()
543 			clkrst3_base, BIT(4), CLK_SET_RATE_GATE);  in u8540_clk_init()
547 			clkrst3_base, BIT(5), CLK_SET_RATE_GATE);  in u8540_clk_init()
552 			clkrst3_base, BIT(6), CLK_SET_RATE_GATE);  in u8540_clk_init()
556 			clkrst3_base, BIT(7), CLK_SET_RATE_GATE);  in u8540_clk_init()
560 			clkrst3_base, BIT(8), CLK_SET_RATE_GATE);  in u8540_clk_init()
564 			clkrst3_base, BIT(9), CLK_SET_RATE_GATE);  in u8540_clk_init()
568 			clkrst3_base, BIT(10), CLK_SET_RATE_GATE);  in u8540_clk_init()
572 			clkrst3_base, BIT(11), CLK_SET_RATE_GATE);  in u8540_clk_init()