17 void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,  in u8540_clk_init()  argument
277 	clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", clkrst2_base,  in u8540_clk_init()
281 	clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", clkrst2_base,  in u8540_clk_init()
285 	clk = clk_reg_prcc_pclk("p2_pclk2", "per2clk", clkrst2_base,  in u8540_clk_init()
289 	clk = clk_reg_prcc_pclk("p2_pclk3", "per2clk", clkrst2_base,  in u8540_clk_init()
293 	clk = clk_reg_prcc_pclk("p2_pclk4", "per2clk", clkrst2_base,  in u8540_clk_init()
297 	clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", clkrst2_base,  in u8540_clk_init()
302 	clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", clkrst2_base,  in u8540_clk_init()
306 	clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", clkrst2_base,  in u8540_clk_init()
310 	clk = clk_reg_prcc_pclk("p2_pclk8", "per2clk", clkrst2_base,  in u8540_clk_init()
314 	clk = clk_reg_prcc_pclk("p2_pclk9", "per2clk", clkrst2_base,  in u8540_clk_init()
318 	clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", clkrst2_base,  in u8540_clk_init()
322 	clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", clkrst2_base,  in u8540_clk_init()
328 	clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", clkrst2_base,  in u8540_clk_init()
489 			clkrst2_base, BIT(0), CLK_SET_RATE_GATE);  in u8540_clk_init()
493 			clkrst2_base, BIT(1), CLK_SET_RATE_GATE);  in u8540_clk_init()
497 			clkrst2_base, BIT(2), CLK_SET_RATE_GATE);  in u8540_clk_init()
501 			clkrst2_base, BIT(3), CLK_SET_RATE_GATE);  in u8540_clk_init()
506 			clkrst2_base, BIT(4), CLK_SET_RATE_GATE);  in u8540_clk_init()
510 			clkrst2_base, BIT(5), CLK_SET_RATE_GATE);  in u8540_clk_init()
514 			clkrst2_base, BIT(6),  in u8540_clk_init()
519 			clkrst2_base, BIT(7),  in u8540_clk_init()
525 			clkrst2_base, BIT(9), CLK_SET_RATE_GATE);  in u8540_clk_init()