Lines Matching refs:clkrst1_base

57 void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,  in u8500_of_clk_init()  argument
249 clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", clkrst1_base, in u8500_of_clk_init()
253 clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", clkrst1_base, in u8500_of_clk_init()
257 clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", clkrst1_base, in u8500_of_clk_init()
261 clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", clkrst1_base, in u8500_of_clk_init()
265 clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", clkrst1_base, in u8500_of_clk_init()
269 clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", clkrst1_base, in u8500_of_clk_init()
273 clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", clkrst1_base, in u8500_of_clk_init()
277 clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", clkrst1_base, in u8500_of_clk_init()
281 clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", clkrst1_base, in u8500_of_clk_init()
285 clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", clkrst1_base, in u8500_of_clk_init()
289 clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", clkrst1_base, in u8500_of_clk_init()
293 clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", clkrst1_base, in u8500_of_clk_init()
435 clkrst1_base, BIT(0), CLK_SET_RATE_GATE); in u8500_of_clk_init()
439 clkrst1_base, BIT(1), CLK_SET_RATE_GATE); in u8500_of_clk_init()
443 clkrst1_base, BIT(2), CLK_SET_RATE_GATE); in u8500_of_clk_init()
447 clkrst1_base, BIT(3), CLK_SET_RATE_GATE); in u8500_of_clk_init()
451 clkrst1_base, BIT(4), CLK_SET_RATE_GATE); in u8500_of_clk_init()
455 clkrst1_base, BIT(5), CLK_SET_RATE_GATE); in u8500_of_clk_init()
459 clkrst1_base, BIT(6), CLK_SET_RATE_GATE); in u8500_of_clk_init()
463 clkrst1_base, BIT(8), CLK_SET_RATE_GATE); in u8500_of_clk_init()
467 clkrst1_base, BIT(9), CLK_SET_RATE_GATE); in u8500_of_clk_init()
471 clkrst1_base, BIT(10), CLK_SET_RATE_GATE); in u8500_of_clk_init()