Lines Matching refs:enable_mask
243 dd->enable_mask = dpll->enable_mask; in ti_clk_register_dpll()
454 .enable_mask = 0x7, in of_ti_omap3_dpll_setup()
474 .enable_mask = 0x7, in of_ti_omap3_core_dpll_setup()
493 .enable_mask = 0x7 << 16, in of_ti_omap3_per_dpll_setup()
513 .enable_mask = 0x7 << 16, in of_ti_omap3_per_jtype_dpll_setup()
536 .enable_mask = 0x7, in of_ti_omap4_dpll_setup()
555 .enable_mask = 0x7, in of_ti_omap5_mpu_dpll_setup()
576 .enable_mask = 0x7, in of_ti_omap4_core_dpll_setup()
597 .enable_mask = 0x7, in of_ti_omap4_m4xen_dpll_setup()
618 .enable_mask = 0x7, in of_ti_omap4_jtype_dpll_setup()
640 .enable_mask = 0x7, in of_ti_am3_no_gate_dpll_setup()
658 .enable_mask = 0x7, in of_ti_am3_jtype_dpll_setup()
677 .enable_mask = 0x7, in of_ti_am3_no_gate_jtype_dpll_setup()
697 .enable_mask = 0x7, in of_ti_am3_dpll_setup()
714 .enable_mask = 0x7, in of_ti_am3_core_dpll_setup()
731 .enable_mask = 0x3, in of_ti_omap2_core_dpll_setup()