Lines Matching refs:parent

106 	.parent = "osc_sys_ck",
156 .parent = "dpll3_ck",
171 .parent = "dpll3_m2_ck",
183 .parent = "core_ck",
197 .parent = "l3_ick",
209 .parent = "sys_ck",
221 .parent = "wkup_l4_ick",
236 .parent = "sys_ck",
250 .parent = "l3_ick",
265 .parent = "l4_ick",
277 .parent = "core_l4_ick",
328 .parent = "dpll4_ck",
342 .parent = "dpll4_m2_ck",
354 .parent = "dpll4_m2x2_mul_ck",
368 .parent = "dpll4_m2x2_ck",
380 .parent = "omap_96m_alwon_fck",
411 .parent = "omap_96m_fck",
423 .parent = "core_96m_fck",
438 .parent = "l4_ick",
453 .parent = "core_l4_ick",
468 .parent = "l4_ick",
480 .parent = "security_l4_ick2",
529 .parent = "dpll5_ck",
543 .parent = "dpll5_m2_ck",
557 .parent = "cm_96m_fck",
598 .parent = "omap_48m_fck",
620 .parent = "mcbsp_clks",
627 .parent = "omap_96m_alwon_fck",
663 .parent = "dpll3_m2_ck",
675 .parent = "dpll3_m2x2_ck",
687 .parent = "corex2_fck",
708 .parent = "corex2_fck",
727 .parent = "ssi_ssr_fck",
749 .parent = "omap_32k_fck",
761 .parent = "per_32k_alwon_fck",
775 .parent = "wkup_l4_ick",
790 .parent = "core_48m_fck",
805 .parent = "sys_ck",
835 .parent = "core_l4_ick",
850 .parent = "core_48m_fck",
865 .parent = "l4_ick",
877 .parent = "omap_96m_fck",
889 .parent = "dpll4_ck",
903 .parent = "dpll4_m5_ck",
916 .parent = "dpll4_m5x2_mul_ck",
930 .parent = "dpll4_m5x2_ck",
944 .parent = "mcbsp_clks",
974 .parent = "core_96m_fck",
988 .parent = "sys_ck",
1019 .parent = "dpll3_ck",
1034 .parent = "dpll3_m3_ck",
1046 .parent = "sys_ck",
1071 .parent = "wkup_l4_ick",
1086 .parent = "l3_ick",
1098 .parent = "core_48m_fck",
1113 .parent = "omap_48m_fck",
1125 .parent = "per_48m_fck",
1140 .parent = "omap_96m_fck",
1152 .parent = "omap_96m_fck",
1159 .parent = "l4_ick",
1171 .parent = "per_l4_ick",
1186 .parent = "core_l4_ick",
1201 .parent = "l4_ick",
1214 .parent = "ssi_l4_ick",
1229 .parent = "core_96m_fck",
1244 .parent = "core_ck",
1304 .parent = "per_l4_ick",
1319 .parent = "dpll4_ck",
1333 .parent = "dpll4_m4_ck",
1346 .parent = "dpll4_m4x2_mul_ck",
1360 .parent = "dpll4_m4x2_ck",
1375 .parent = "per_l4_ick",
1390 .parent = "dpll4_ck",
1405 .parent = "per_l4_ick",
1420 .parent = "per_32k_alwon_fck",
1434 .parent = "core_l4_ick",
1449 .parent = "core_ck",
1457 .parent = "dpll4_m3_ck",
1469 .parent = "dpll4_m3x2_mul_ck",
1527 .parent = "core_96m_fck",
1542 .parent = "per_32k_alwon_fck",
1557 .parent = "sys_ck",
1588 .parent = "l4_ick",
1596 .parent = "l4_ick",
1616 .parent = "per_l4_ick",
1654 .parent = "per_l4_ick",
1669 .parent = "sys_ck",
1676 .parent = "l4_ick",
1691 .parent = "core_l4_ick",
1706 .parent = "core_ck",
1721 .parent = "core_48m_fck",
1736 .parent = "core_l3_ick",
1751 .parent = "per_l4_ick",
1766 .parent = "core_l4_ick",
1781 .parent = "sys_ck",
1796 .parent = "per_l4_ick",
1811 .parent = "wkup_l4_ick",
1839 .parent = "dpll1_ck",
1851 .parent = "dpll1_x2_ck",
1865 .parent = "dpll1_x2m2_ck",
1877 .parent = "mpu_ck",
1890 .parent = "core_ck",
1902 .parent = "sys_ck",
1933 .parent = "core_ck",
1945 .parent = "core_48m_fck",
1960 .parent = "dpll3_m3x2_mul_ck",
1974 .parent = "dpll3_m3x2_ck",
1986 .parent = "dpll4_ck",
2001 .parent = "dpll4_m6_ck",
2013 .parent = "dpll4_m6x2_mul_ck",
2027 .parent = "dpll4_m6x2_ck",
2039 .parent = "mpu_ck",
2071 .parent = "emu_src_mux_ck",
2083 .parent = "emu_src_ck",
2098 .parent = "core_l3_ick",
2113 .parent = "ipss_ick",
2128 .parent = "ipss_ick",
2178 .parent = "dpll2_ck",
2218 .parent = "sys_ck",
2225 .parent = "per_l4_ick",
2253 .parent = "core_l4_ick",
2268 .parent = "per_l4_ick",
2304 .parent = "traceclk_src_fck",
2319 .parent = "mcbsp_clks",
2326 .parent = "l3_ick",
2353 .parent = "sys_ck",
2368 .parent = "sys_ck",
2386 .parent = "dpll4_m2x2_mul_ck",
2401 .parent = "l3_ick",
2415 .parent = "gfx_l3_fck",
2430 .parent = "core_l4_ick",
2445 .parent = "security_l4_ick2",
2459 .parent = "ipss_ick",
2474 .parent = "core_96m_fck",
2489 .parent = "emu_src_ck",
2541 .parent = "per_48m_fck",
2556 .parent = "omap_32k_fck",
2568 .parent = "osc_sys_ck",
2581 .parent = "core_l3_ick",
2593 .parent = "dpll5_m2_ck",
2605 .parent = "dpll4_m5x2_mul_ck",
2620 .parent = "corex2_fck",
2628 .parent = "core_l4_ick",
2643 .parent = "dpll2_m2_ck",
2658 .parent = "security_l3_ick",
2672 .parent = "wkup_l4_ick",
2711 .parent = "omap_48m_fck",
2726 .parent = "security_l4_ick2",
2740 .parent = "core_ck",
2747 .parent = "core_ck",
2759 .parent = "dpll4_m2x2_ck",
2771 .parent = "core_ck",
2783 .parent = "corex2_fck",
2795 .parent = "corex2_fck",
2836 .parent = "core_48m_fck",
2851 .parent = "core_96m_fck",
2866 .parent = "core_48m_fck",
2881 .parent = "pclk_ck",
2894 .parent = "sys_ck",
2901 .parent = "mcbsp_clks",
2908 .parent = "sys_ck",
2939 .parent = "omap_32k_fck",
2953 .parent = "secure_32k_fck",
2965 .parent = "dpll4_m6x2_mul_ck",
2993 .parent = "l4_ick",
3008 .parent = "per_l4_ick",
3023 .parent = "core_l4_ick",
3038 .parent = "omap_96m_fck",
3050 .parent = "per_l4_ick",
3065 .parent = "dpll3_m3x2_mul_ck",
3080 .parent = "core_l4_ick",
3095 .parent = "per_l4_ick",
3110 .parent = "core_l4_ick",
3136 .parent = "sys_ck",
3153 .parent = "sys_ck",
3171 .parent = "dpll5_m2_ck",
3183 .parent = "sys_ck",
3195 .parent = "omap_96m_fck",
3207 .parent = "dpll5_m2_ck",
3219 .parent = "dpll5_m2_ck",
3277 .parent = "corex2_fck",
3296 .parent = "dpll4_m4x2_ck",
3311 .parent = "per_l4_ick",
3326 .parent = "omap_48m_fck",
3338 .parent = "omap_12m_fck",
3350 .parent = "core_12m_fck",
3365 .parent = "dpll5_m2_ck",
3380 .parent = "sys_ck",
3394 .parent = "core_l3_ick",
3409 .parent = "l3_ick",
3424 .parent = "gfx_l3_ck",
3436 .parent = "core_l4_ick",
3451 .parent = "secure_32k_fck",
3463 .parent = "gfx_l3_fck",
3478 .parent = "core_l4_ick",
3493 .parent = "per_32k_alwon_fck",
3507 .parent = "core_96m_fck",
3533 .parent = "core_l4_ick",
3548 .parent = "wkup_l4_ick",
3563 .parent = "core_l4_ick",
3602 .parent = "mcbsp_clks",
3620 .parent = "per_32k_alwon_fck",
3634 .parent = "core_l4_ick",
3649 .parent = "core_l4_ick",
3664 .parent = "omap_96m_fck",
3678 .parent = "l4_ick",
3693 .parent = "core_l4_ick",
3708 .parent = "dpll3_ck",
3720 .parent = "l3_ick",
3735 .parent = "core_48m_fck",
3750 .parent = "sys_ck",
3765 .parent = "core_l4_ick",
3780 .parent = "core_l3_ick",
3806 .parent = "dpll4_m3x2_mul_ck",
3821 .parent = "sys_ck",
3835 .parent = "core_l4_ick",
3850 .parent = "ssi_ssr_fck",
3862 .parent = "wkup_32k_fck",
3876 .parent = "per_l4_ick",
3891 .parent = "per_l4_ick",
3906 .parent = "core_96m_fck",
3931 .parent = "per_32k_alwon_fck",
3945 .parent = "core_l4_ick",
3960 .parent = "dpll4_ck",
3972 .parent = "per_l4_ick",
3987 .parent = "omap_54m_fck",
4001 .parent = "core_l4_ick",
4016 .parent = "core_l4_ick",
4031 .parent = "sys_ck",
4046 .parent = "per_l4_ick",
4061 .parent = "emu_src_ck",
4076 .parent = "core_l4_ick",
4091 .parent = "rmii_ck",
4115 .parent = "wkup_32k_fck",
4130 .parent = "l4_ick",
4145 .parent = "ssi_l4_ick",
4160 .parent = "per_l4_ick",
4175 .parent = "wkup_l4_ick",
4190 .parent = "security_l4_ick2",
4204 .parent = "core_l4_ick",
4219 .parent = "l3_ick",
4234 .parent = "clkout2_src_ck",