41 	struct dpll_data *ad;  in dra7_apll_enable()  local
46 	ad = clk->dpll_data;  in dra7_apll_enable()
47 	if (!ad)  in dra7_apll_enable()
52 	state <<= __ffs(ad->idlest_mask);  in dra7_apll_enable()
55 	v = ti_clk_ll_ops->clk_readl(ad->idlest_reg);  in dra7_apll_enable()
57 	if ((v & ad->idlest_mask) == state)  in dra7_apll_enable()
60 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in dra7_apll_enable()
61 	v &= ~ad->enable_mask;  in dra7_apll_enable()
62 	v |= APLL_FORCE_LOCK << __ffs(ad->enable_mask);  in dra7_apll_enable()
63 	ti_clk_ll_ops->clk_writel(v, ad->control_reg);  in dra7_apll_enable()
65 	state <<= __ffs(ad->idlest_mask);  in dra7_apll_enable()
68 		v = ti_clk_ll_ops->clk_readl(ad->idlest_reg);  in dra7_apll_enable()
69 		if ((v & ad->idlest_mask) == state)  in dra7_apll_enable()
91 	struct dpll_data *ad;  in dra7_apll_disable()  local
95 	ad = clk->dpll_data;  in dra7_apll_disable()
97 	state <<= __ffs(ad->idlest_mask);  in dra7_apll_disable()
99 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in dra7_apll_disable()
100 	v &= ~ad->enable_mask;  in dra7_apll_disable()
101 	v |= APLL_AUTO_IDLE << __ffs(ad->enable_mask);  in dra7_apll_disable()
102 	ti_clk_ll_ops->clk_writel(v, ad->control_reg);  in dra7_apll_disable()
108 	struct dpll_data *ad;  in dra7_apll_is_enabled()  local
111 	ad = clk->dpll_data;  in dra7_apll_is_enabled()
113 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in dra7_apll_is_enabled()
114 	v &= ad->enable_mask;  in dra7_apll_is_enabled()
116 	v >>= __ffs(ad->enable_mask);  in dra7_apll_is_enabled()
137 	struct dpll_data *ad = clk_hw->dpll_data;  in omap_clk_register_apll()  local
140 	ad->clk_ref = of_clk_get(node, 0);  in omap_clk_register_apll()
141 	ad->clk_bypass = of_clk_get(node, 1);  in omap_clk_register_apll()
143 	if (IS_ERR(ad->clk_ref) || IS_ERR(ad->clk_bypass)) {  in omap_clk_register_apll()
169 	struct dpll_data *ad = NULL;  in of_dra7_apll_setup()  local
175 	ad = kzalloc(sizeof(*ad), GFP_KERNEL);  in of_dra7_apll_setup()
178 	if (!ad || !clk_hw || !init)  in of_dra7_apll_setup()
181 	clk_hw->dpll_data = ad;  in of_dra7_apll_setup()
203 	ad->control_reg = ti_clk_get_reg_addr(node, 0);  in of_dra7_apll_setup()
204 	ad->idlest_reg = ti_clk_get_reg_addr(node, 1);  in of_dra7_apll_setup()
206 	if (IS_ERR(ad->control_reg) || IS_ERR(ad->idlest_reg))  in of_dra7_apll_setup()
209 	ad->idlest_mask = 0x1;  in of_dra7_apll_setup()
210 	ad->enable_mask = 0x3;  in of_dra7_apll_setup()
217 	kfree(ad);  in of_dra7_apll_setup()
229 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_is_enabled()  local
232 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in omap2_apll_is_enabled()
233 	v &= ad->enable_mask;  in omap2_apll_is_enabled()
235 	v >>= __ffs(ad->enable_mask);  in omap2_apll_is_enabled()
254 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_enable()  local
258 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in omap2_apll_enable()
259 	v &= ~ad->enable_mask;  in omap2_apll_enable()
260 	v |= OMAP2_EN_APLL_LOCKED << __ffs(ad->enable_mask);  in omap2_apll_enable()
261 	ti_clk_ll_ops->clk_writel(v, ad->control_reg);  in omap2_apll_enable()
264 		v = ti_clk_ll_ops->clk_readl(ad->idlest_reg);  in omap2_apll_enable()
265 		if (v & ad->idlest_mask)  in omap2_apll_enable()
285 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_disable()  local
288 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in omap2_apll_disable()
289 	v &= ~ad->enable_mask;  in omap2_apll_disable()
290 	v |= OMAP2_EN_APLL_STOPPED << __ffs(ad->enable_mask);  in omap2_apll_disable()
291 	ti_clk_ll_ops->clk_writel(v, ad->control_reg);  in omap2_apll_disable()
303 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_set_autoidle()  local
306 	v = ti_clk_ll_ops->clk_readl(ad->autoidle_reg);  in omap2_apll_set_autoidle()
307 	v &= ~ad->autoidle_mask;  in omap2_apll_set_autoidle()
308 	v |= val << __ffs(ad->autoidle_mask);  in omap2_apll_set_autoidle()
309 	ti_clk_ll_ops->clk_writel(v, ad->control_reg);  in omap2_apll_set_autoidle()
332 	struct dpll_data *ad = NULL;  in of_omap2_apll_setup()  local
339 	ad = kzalloc(sizeof(*ad), GFP_KERNEL);  in of_omap2_apll_setup()
343 	if (!ad || !clk_hw || !init)  in of_omap2_apll_setup()
346 	clk_hw->dpll_data = ad;  in of_omap2_apll_setup()
373 	ad->enable_mask = 0x3 << val;  in of_omap2_apll_setup()
374 	ad->autoidle_mask = 0x3 << val;  in of_omap2_apll_setup()
381 	ad->idlest_mask = 1 << val;  in of_omap2_apll_setup()
383 	ad->control_reg = ti_clk_get_reg_addr(node, 0);  in of_omap2_apll_setup()
384 	ad->autoidle_reg = ti_clk_get_reg_addr(node, 1);  in of_omap2_apll_setup()
385 	ad->idlest_reg = ti_clk_get_reg_addr(node, 2);  in of_omap2_apll_setup()
387 	if (IS_ERR(ad->control_reg) || IS_ERR(ad->autoidle_reg) ||  in of_omap2_apll_setup()
388 	    IS_ERR(ad->idlest_reg))  in of_omap2_apll_setup()
398 	kfree(ad);  in of_omap2_apll_setup()