131 #define MUX(_name, _parents, _offset,	\  argument
133 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
138 #define MUX_FLAGS(_name, _parents, _offset,\  argument
140 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
145 #define MUX8(_name, _parents, _offset, \  argument
147 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
152 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock)	\  argument
153 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,	\
158 #define INT(_name, _parents, _offset,	\  argument
160 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
165 #define INT_FLAGS(_name, _parents, _offset,\  argument
167 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
172 #define INT8(_name, _parents, _offset,\  argument
174 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
179 #define UART(_name, _parents, _offset,\  argument
181 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
186 #define I2C(_name, _parents, _offset,\  argument
188 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
192 #define XUSB(_name, _parents, _offset, \  argument
194 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
199 #define AUDIO(_name, _offset,  _clk_num,\  argument
201 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, mux_d_audio_clk,	\
206 #define NODIV(_name, _parents, _offset, \  argument
209 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
214 #define GATE(_name, _parent_name,	\  argument
217 		.name = _name,						\