399 	for (sel = pll->params->freq_table; sel->input_rate != 0; sel++)  in _get_table_rate()
400 		if (sel->input_rate == parent_rate &&  in _get_table_rate()
404 	if (sel->input_rate == 0)  in _get_table_rate()
407 	cfg->input_rate = sel->input_rate;  in _get_table_rate()
732 	unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk));  in clk_plle_enable()  local
737 	if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate))  in clk_plle_enable()
1128 					unsigned long input_rate, u32 n)  in _pllcx_update_dynamic_coef()  argument
1132 	switch (input_rate) {  in _pllcx_update_dynamic_coef()
1148 			__func__, input_rate);  in _pllcx_update_dynamic_coef()
1291 	unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk));  in clk_plle_tegra114_enable()  local
1293 	if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate))  in clk_plle_tegra114_enable()