46 	struct clkgen_field mdiv;  member
65 	.mdiv		= CLKGEN_FIELD(0x0, C65_MDIV_PLL1600_MASK,	0),
73 	.mdiv		= CLKGEN_FIELD(0x0,	C65_MDIV_PLL800_MASK,	0),
277 	unsigned long mdiv, ndiv, pdiv;  in recalc_stm_pll800c65()  local
285 	mdiv = CLKGEN_READ(pll, mdiv);  in recalc_stm_pll800c65()
288 	if (!mdiv)  in recalc_stm_pll800c65()
289 		mdiv++; /* mdiv=0 or 1 => MDIV=1 */  in recalc_stm_pll800c65()
292 	rate = (unsigned long)div64_u64(res, mdiv * (1 << pdiv));  in recalc_stm_pll800c65()
304 	unsigned long mdiv, ndiv;  in recalc_stm_pll1600c65()  local
310 	mdiv = CLKGEN_READ(pll, mdiv);  in recalc_stm_pll1600c65()
313 	if (!mdiv)  in recalc_stm_pll1600c65()
314 		mdiv = 1;  in recalc_stm_pll1600c65()
317 	rate = ((2 * (parent_rate / 1000) * ndiv) / mdiv) * 1000;  in recalc_stm_pll1600c65()