Lines Matching refs:misc_base
23 #define SPEAR1340_SYS_CLK_CTRL (misc_base + 0x200)
30 #define SPEAR1340_PLL_CFG (misc_base + 0x210)
42 #define SPEAR1340_PLL1_CTR (misc_base + 0x214)
43 #define SPEAR1340_PLL1_FRQ (misc_base + 0x218)
44 #define SPEAR1340_PLL2_CTR (misc_base + 0x220)
45 #define SPEAR1340_PLL2_FRQ (misc_base + 0x224)
46 #define SPEAR1340_PLL3_CTR (misc_base + 0x22C)
47 #define SPEAR1340_PLL3_FRQ (misc_base + 0x230)
48 #define SPEAR1340_PLL4_CTR (misc_base + 0x238)
49 #define SPEAR1340_PLL4_FRQ (misc_base + 0x23C)
50 #define SPEAR1340_PERIP_CLK_CFG (misc_base + 0x244)
68 #define SPEAR1340_GMAC_CLK_CFG (misc_base + 0x248)
74 #define SPEAR1340_I2S_CLK_CFG (misc_base + 0x24C)
92 #define SPEAR1340_C3_CLK_SYNT (misc_base + 0x250)
93 #define SPEAR1340_UART0_CLK_SYNT (misc_base + 0x254)
94 #define SPEAR1340_UART1_CLK_SYNT (misc_base + 0x258)
95 #define SPEAR1340_GMAC_CLK_SYNT (misc_base + 0x25C)
96 #define SPEAR1340_SDHCI_CLK_SYNT (misc_base + 0x260)
97 #define SPEAR1340_CFXD_CLK_SYNT (misc_base + 0x264)
98 #define SPEAR1340_ADC_CLK_SYNT (misc_base + 0x270)
99 #define SPEAR1340_AMBA_CLK_SYNT (misc_base + 0x274)
100 #define SPEAR1340_CLCD_CLK_SYNT (misc_base + 0x27C)
101 #define SPEAR1340_SYS_CLK_SYNT (misc_base + 0x284)
102 #define SPEAR1340_GEN_CLK_SYNT0 (misc_base + 0x28C)
103 #define SPEAR1340_GEN_CLK_SYNT1 (misc_base + 0x294)
104 #define SPEAR1340_GEN_CLK_SYNT2 (misc_base + 0x29C)
105 #define SPEAR1340_GEN_CLK_SYNT3 (misc_base + 0x304)
106 #define SPEAR1340_PERIP1_CLK_ENB (misc_base + 0x30C)
135 #define SPEAR1340_PERIP2_CLK_ENB (misc_base + 0x310)
146 #define SPEAR1340_PERIP3_CLK_ENB (misc_base + 0x314)
443 void __init spear1340_clk_init(void __iomem *misc_base) in spear1340_clk_init() argument