58 static inline unsigned long clkc_readl(unsigned reg)  in clkc_readl()  function
80 	if (clkc_readl(regcfg2) & BIT(2)) {  in pll_clk_recalc_rate()
85 		u32 cfg0 = clkc_readl(clk->regofs);  in pll_clk_recalc_rate()
155 	while (!(clkc_readl(reg) & BIT(6)))  in pll_clk_set_rate()
298 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_get_parent()
312 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_set_parent()
321 	while (clkc_readl(clk->regofs) & BIT(3))  in dmn_clk_set_parent()
334 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_recalc_rate()
390 	reg = clkc_readl(clk->regofs);  in dmn_clk_set_rate()
396 	while (clkc_readl(clk->regofs) & BIT(25))  in dmn_clk_set_rate()
640 	return !!(clkc_readl(reg) & BIT(bit));  in std_clk_is_enabled()
655 	val = clkc_readl(reg) | BIT(bit);  in std_clk_enable()
672 	val = clkc_readl(reg) & ~BIT(bit);  in std_clk_disable()