76 	struct clk_pll *clk = to_pllclk(hw);  in pll_clk_recalc_rate()  local
77 	u32 regcfg2 = clk->regofs + SIRFSOC_CLKC_PLL1_CFG2 -  in pll_clk_recalc_rate()
85 		u32 cfg0 = clkc_readl(clk->regofs);  in pll_clk_recalc_rate()
128 	struct clk_pll *clk = to_pllclk(hw);  in pll_clk_set_rate()  local
149 	clkc_writel(reg, clk->regofs);  in pll_clk_set_rate()
151 	reg = clk->regofs + SIRFSOC_CLKC_PLL1_CFG1 - SIRFSOC_CLKC_PLL1_CFG0;  in pll_clk_set_rate()
154 	reg = clk->regofs + SIRFSOC_CLKC_PLL1_CFG2 - SIRFSOC_CLKC_PLL1_CFG0;  in pll_clk_set_rate()
168 	struct clk *parent_clk = clk_get_parent(hw->clk);  in cpu_clk_round_rate()
169 	struct clk *pll_parent_clk = clk_get_parent(parent_clk);  in cpu_clk_round_rate()
181 	struct clk *parent_clk = clk_get_parent(hw->clk);  in cpu_clk_recalc_rate()
253 static void usb_pll_clk_disable(struct clk_hw *clk)  in usb_pll_clk_disable()  argument
297 	struct clk_dmn *clk = to_dmnclk(hw);  in dmn_clk_get_parent()  local
298 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_get_parent()
311 	struct clk_dmn *clk = to_dmnclk(hw);  in dmn_clk_set_parent()  local
312 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_set_parent()
319 	clkc_writel(cfg | parent, clk->regofs);  in dmn_clk_set_parent()
321 	while (clkc_readl(clk->regofs) & BIT(3))  in dmn_clk_set_parent()
332 	struct clk_dmn *clk = to_dmnclk(hw);  in dmn_clk_recalc_rate()  local
334 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_recalc_rate()
374 	struct clk_dmn *clk = to_dmnclk(hw);  in dmn_clk_set_rate()  local
390 	reg = clkc_readl(clk->regofs);  in dmn_clk_set_rate()
393 	clkc_writel(reg, clk->regofs);  in dmn_clk_set_rate()
396 	while (clkc_readl(clk->regofs) & BIT(25))  in dmn_clk_set_rate()
406 	struct clk *cur_parent;  in cpu_clk_set_rate()
408 	if (rate == clk_get_rate(clk_pll1.hw.clk)) {  in cpu_clk_set_rate()
409 		ret1 = clk_set_parent(hw->clk, clk_pll1.hw.clk);  in cpu_clk_set_rate()
413 	if (rate == clk_get_rate(clk_pll2.hw.clk)) {  in cpu_clk_set_rate()
414 		ret1 = clk_set_parent(hw->clk, clk_pll2.hw.clk);  in cpu_clk_set_rate()
418 	if (rate == clk_get_rate(clk_pll3.hw.clk)) {  in cpu_clk_set_rate()
419 		ret1 = clk_set_parent(hw->clk, clk_pll3.hw.clk);  in cpu_clk_set_rate()
423 	cur_parent = clk_get_parent(hw->clk);  in cpu_clk_set_rate()
426 	if (cur_parent ==  clk_pll1.hw.clk) {  in cpu_clk_set_rate()
427 		ret1 = clk_set_parent(hw->clk, clk_pll2.hw.clk);  in cpu_clk_set_rate()
431 	ret2 = clk_set_rate(clk_pll1.hw.clk, rate);  in cpu_clk_set_rate()
433 	ret1 = clk_set_parent(hw->clk, clk_pll1.hw.clk);  in cpu_clk_set_rate()
634 	struct clk_std *clk = to_stdclk(hw);  in std_clk_is_enabled()  local
636 	bit = clk->enable_bit % 32;  in std_clk_is_enabled()
637 	reg = clk->enable_bit / 32;  in std_clk_is_enabled()
647 	struct clk_std *clk = to_stdclk(hw);  in std_clk_enable()  local
649 	BUG_ON(clk->enable_bit < 0 || clk->enable_bit > 63);  in std_clk_enable()
651 	bit = clk->enable_bit % 32;  in std_clk_enable()
652 	reg = clk->enable_bit / 32;  in std_clk_enable()
664 	struct clk_std *clk = to_stdclk(hw);  in std_clk_disable()  local
666 	BUG_ON(clk->enable_bit < 0 || clk->enable_bit > 63);  in std_clk_disable()
668 	bit = clk->enable_bit % 32;  in std_clk_disable()
669 	reg = clk->enable_bit / 32;  in std_clk_disable()