Lines Matching refs:__initdata
76 static unsigned long s3c64xx_clk_regs[] __initdata = {
93 static unsigned long s3c6410_clk_regs[] __initdata = {
179 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_ext_clks) __initdata = {
185 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_clks) __initdata = {
191 MUX_CLOCKS(s3c64xx_mux_clks) __initdata = {
208 MUX_CLOCKS(s3c6400_mux_clks) __initdata = {
216 MUX_CLOCKS(s3c6410_mux_clks) __initdata = {
227 DIV_CLOCKS(s3c64xx_div_clks) __initdata = {
251 DIV_CLOCKS(s3c6400_div_clks) __initdata = {
256 DIV_CLOCKS(s3c6410_div_clks) __initdata = {
263 GATE_CLOCKS(s3c64xx_gate_clks) __initdata = {
343 GATE_CLOCKS(s3c6400_gate_clks) __initdata = {
349 GATE_CLOCKS(s3c6410_gate_clks) __initdata = {
367 static struct samsung_pll_clock s3c64xx_pll_clks[] __initdata = {