Lines Matching refs:GATE
144 GATE(ACLK_MSCL_532, "aclk_mscl_532", "dout_aclk_mscl_532",
307 GATE(CLK_SCLK_SPDIF, "sclk_spdif", "dout_sclk_spdif",
309 GATE(CLK_SCLK_PCM1, "sclk_pcm1", "dout_sclk_pcm1",
311 GATE(CLK_SCLK_I2S1, "sclk_i2s1", "dout_sclk_i2s1",
314 GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_sclk_spi1",
316 GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_sclk_spi0",
319 GATE(CLK_SCLK_SPI3, "sclk_spi3", "dout_sclk_spi3",
321 GATE(CLK_SCLK_SPI2, "sclk_spi2", "dout_sclk_spi2",
323 GATE(CLK_SCLK_UART3, "sclk_uart3", "dout_sclk_uart3",
325 GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_sclk_uart2",
327 GATE(CLK_SCLK_UART1, "sclk_uart1", "dout_sclk_uart1",
329 GATE(CLK_SCLK_UART0, "sclk_uart0", "dout_sclk_uart0",
331 GATE(CLK_SCLK_SPI4, "sclk_spi4", "dout_sclk_spi4",
456 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_sclk_mmc2",
458 GATE(0, "sclk_usbdrd300", "dout_sclk_usbdrd300",
461 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_sclk_mmc1",
463 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "dout_sclk_mmc0",
519 GATE(PCLK_RTC, "pclk_rtc", "mout_aclk_ccore_133_user",
564 GATE(PCLK_HSI2C0, "pclk_hsi2c0", "mout_aclk_peric0_66_user",
566 GATE(PCLK_HSI2C1, "pclk_hsi2c1", "mout_aclk_peric0_66_user",
568 GATE(PCLK_HSI2C4, "pclk_hsi2c4", "mout_aclk_peric0_66_user",
570 GATE(PCLK_HSI2C5, "pclk_hsi2c5", "mout_aclk_peric0_66_user",
572 GATE(PCLK_HSI2C9, "pclk_hsi2c9", "mout_aclk_peric0_66_user",
574 GATE(PCLK_HSI2C10, "pclk_hsi2c10", "mout_aclk_peric0_66_user",
576 GATE(PCLK_HSI2C11, "pclk_hsi2c11", "mout_aclk_peric0_66_user",
578 GATE(PCLK_UART0, "pclk_uart0", "mout_aclk_peric0_66_user",
580 GATE(PCLK_ADCIF, "pclk_adcif", "mout_aclk_peric0_66_user",
582 GATE(PCLK_PWM, "pclk_pwm", "mout_aclk_peric0_66_user",
585 GATE(SCLK_UART0, "sclk_uart0_user", "mout_sclk_uart0_user",
587 GATE(SCLK_PWM, "sclk_pwm", "fin_pll", ENABLE_SCLK_PERIC0, 21, 0, 0),
657 GATE(PCLK_HSI2C2, "pclk_hsi2c2", "mout_aclk_peric1_66_user",
659 GATE(PCLK_HSI2C3, "pclk_hsi2c3", "mout_aclk_peric1_66_user",
661 GATE(PCLK_HSI2C6, "pclk_hsi2c6", "mout_aclk_peric1_66_user",
663 GATE(PCLK_HSI2C7, "pclk_hsi2c7", "mout_aclk_peric1_66_user",
665 GATE(PCLK_HSI2C8, "pclk_hsi2c8", "mout_aclk_peric1_66_user",
667 GATE(PCLK_UART1, "pclk_uart1", "mout_aclk_peric1_66_user",
669 GATE(PCLK_UART2, "pclk_uart2", "mout_aclk_peric1_66_user",
671 GATE(PCLK_UART3, "pclk_uart3", "mout_aclk_peric1_66_user",
673 GATE(PCLK_SPI0, "pclk_spi0", "mout_aclk_peric1_66_user",
675 GATE(PCLK_SPI1, "pclk_spi1", "mout_aclk_peric1_66_user",
677 GATE(PCLK_SPI2, "pclk_spi2", "mout_aclk_peric1_66_user",
679 GATE(PCLK_SPI3, "pclk_spi3", "mout_aclk_peric1_66_user",
681 GATE(PCLK_SPI4, "pclk_spi4", "mout_aclk_peric1_66_user",
683 GATE(PCLK_I2S1, "pclk_i2s1", "mout_aclk_peric1_66_user",
685 GATE(PCLK_PCM1, "pclk_pcm1", "mout_aclk_peric1_66_user",
687 GATE(PCLK_SPDIF, "pclk_spdif", "mout_aclk_peric1_66_user",
690 GATE(SCLK_UART1, "sclk_uart1_user", "mout_sclk_uart1_user",
692 GATE(SCLK_UART2, "sclk_uart2_user", "mout_sclk_uart2_user",
694 GATE(SCLK_UART3, "sclk_uart3_user", "mout_sclk_uart3_user",
696 GATE(SCLK_SPI0, "sclk_spi0_user", "mout_sclk_spi0_user",
698 GATE(SCLK_SPI1, "sclk_spi1_user", "mout_sclk_spi1_user",
700 GATE(SCLK_SPI2, "sclk_spi2_user", "mout_sclk_spi2_user",
702 GATE(SCLK_SPI3, "sclk_spi3_user", "mout_sclk_spi3_user",
704 GATE(SCLK_SPI4, "sclk_spi4_user", "mout_sclk_spi4_user",
706 GATE(SCLK_I2S1, "sclk_i2s1_user", "sclk_i2s1",
708 GATE(SCLK_PCM1, "sclk_pcm1_user", "sclk_pcm1",
710 GATE(SCLK_SPDIF, "sclk_spdif_user", "sclk_spdif",
756 GATE(PCLK_WDT, "pclk_wdt", "mout_aclk_peris_66_user",
758 GATE(PCLK_TMU, "pclk_tmu_apbif", "mout_aclk_peris_66_user",
761 GATE(PCLK_CHIPID, "pclk_chipid", "mout_aclk_peris_66_user",
763 GATE(SCLK_CHIPID, "sclk_chipid", "fin_pll",
766 GATE(SCLK_TMU, "sclk_tmu", "fin_pll", ENABLE_SCLK_PERIS, 10, 0, 0),
845 GATE(ACLK_AXIUS_USBDRD30X_FSYS0X, "aclk_axius_usbdrd30x_fsys0x",
848 GATE(ACLK_PDMA1, "aclk_pdma1", "mout_aclk_fsys0_200_user",
850 GATE(ACLK_PDMA0, "aclk_pdma0", "mout_aclk_fsys0_200_user",
853 GATE(ACLK_USBDRD300, "aclk_usbdrd300", "mout_aclk_fsys0_200_user",
855 GATE(ACLK_MMC2, "aclk_mmc2", "mout_aclk_fsys0_200_user",
858 GATE(SCLK_USBDRD300_SUSPENDCLK, "sclk_usbdrd300_suspendclk",
861 GATE(SCLK_USBDRD300_REFCLK, "sclk_usbdrd300_refclk", "fin_pll",
864 GATE(PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER,
868 GATE(PHYCLK_USBDRD300_UDRD30_PHYCLK_USER,
873 GATE(OSCCLK_PHY_CLKOUT_USB30_PHY, "oscclk_phy_clkout_usb30_phy",
923 GATE(ACLK_MMC1, "aclk_mmc1", "mout_aclk_fsys1_200_user",
925 GATE(ACLK_MMC0, "aclk_mmc0", "mout_aclk_fsys1_200_user",
972 GATE(ACLK_MSCL_0, "aclk_mscl_0", "usermux_aclk_mscl_532",
974 GATE(ACLK_MSCL_1, "aclk_mscl_1", "usermux_aclk_mscl_532",
976 GATE(ACLK_JPEG, "aclk_jpeg", "usermux_aclk_mscl_532",
978 GATE(ACLK_G2D, "aclk_g2d", "usermux_aclk_mscl_532",
980 GATE(ACLK_LH_ASYNC_SI_MSCL_0, "aclk_lh_async_si_mscl_0",
983 GATE(ACLK_LH_ASYNC_SI_MSCL_1, "aclk_lh_async_si_mscl_1",
986 GATE(ACLK_XIU_MSCLX_0, "aclk_xiu_msclx_0", "usermux_aclk_mscl_532",
988 GATE(ACLK_XIU_MSCLX_1, "aclk_xiu_msclx_1", "usermux_aclk_mscl_532",
990 GATE(ACLK_AXI2ACEL_BRIDGE, "aclk_axi2acel_bridge",
993 GATE(ACLK_QE_MSCL_0, "aclk_qe_mscl_0", "usermux_aclk_mscl_532",
995 GATE(ACLK_QE_MSCL_1, "aclk_qe_mscl_1", "usermux_aclk_mscl_532",
997 GATE(ACLK_QE_JPEG, "aclk_qe_jpeg", "usermux_aclk_mscl_532",
999 GATE(ACLK_QE_G2D, "aclk_qe_g2d", "usermux_aclk_mscl_532",
1001 GATE(ACLK_PPMU_MSCL_0, "aclk_ppmu_mscl_0", "usermux_aclk_mscl_532",
1003 GATE(ACLK_PPMU_MSCL_1, "aclk_ppmu_mscl_1", "usermux_aclk_mscl_532",
1005 GATE(ACLK_MSCLNP_133, "aclk_msclnp_133", "usermux_aclk_mscl_532",
1007 GATE(ACLK_AHB2APB_MSCL0P, "aclk_ahb2apb_mscl0p",
1010 GATE(ACLK_AHB2APB_MSCL1P, "aclk_ahb2apb_mscl1p",
1014 GATE(PCLK_MSCL_0, "pclk_mscl_0", "dout_pclk_mscl",
1016 GATE(PCLK_MSCL_1, "pclk_mscl_1", "dout_pclk_mscl",
1018 GATE(PCLK_JPEG, "pclk_jpeg", "dout_pclk_mscl",
1020 GATE(PCLK_G2D, "pclk_g2d", "dout_pclk_mscl",
1022 GATE(PCLK_QE_MSCL_0, "pclk_qe_mscl_0", "dout_pclk_mscl",
1024 GATE(PCLK_QE_MSCL_1, "pclk_qe_mscl_1", "dout_pclk_mscl",
1026 GATE(PCLK_QE_JPEG, "pclk_qe_jpeg", "dout_pclk_mscl",
1028 GATE(PCLK_QE_G2D, "pclk_qe_g2d", "dout_pclk_mscl",
1030 GATE(PCLK_PPMU_MSCL_0, "pclk_ppmu_mscl_0", "dout_pclk_mscl",
1032 GATE(PCLK_PPMU_MSCL_1, "pclk_ppmu_mscl_1", "dout_pclk_mscl",
1034 GATE(PCLK_AXI2ACEL_BRIDGE, "pclk_axi2acel_bridge", "dout_pclk_mscl",
1036 GATE(PCLK_PMU_MSCL, "pclk_pmu_mscl", "dout_pclk_mscl",
1102 GATE(SCLK_PCM, "sclk_pcm", "dout_sclk_pcm",
1104 GATE(SCLK_I2S, "sclk_i2s", "dout_sclk_i2s",
1106 GATE(0, "sclk_uart", "dout_sclk_uart", ENABLE_SCLK_AUD, 29, 0, 0),
1107 GATE(0, "sclk_slimbus", "dout_sclk_slimbus",
1110 GATE(0, "pclk_dbg_aud", "dout_aud_pclk_dbg", ENABLE_PCLK_AUD, 19, 0, 0),
1111 GATE(0, "pclk_gpio_aud", "dout_aclk_aud", ENABLE_PCLK_AUD, 20, 0, 0),
1112 GATE(0, "pclk_wdt1", "dout_aclk_aud", ENABLE_PCLK_AUD, 22, 0, 0),
1113 GATE(0, "pclk_wdt0", "dout_aclk_aud", ENABLE_PCLK_AUD, 23, 0, 0),
1114 GATE(0, "pclk_slimbus", "dout_aclk_aud", ENABLE_PCLK_AUD, 24, 0, 0),
1115 GATE(0, "pclk_uart", "dout_aclk_aud", ENABLE_PCLK_AUD, 25, 0, 0),
1116 GATE(PCLK_PCM, "pclk_pcm", "dout_aclk_aud",
1118 GATE(PCLK_I2S, "pclk_i2s", "dout_aclk_aud",
1120 GATE(0, "pclk_timer", "dout_aclk_aud", ENABLE_PCLK_AUD, 28, 0, 0),
1121 GATE(0, "pclk_smmu_aud", "dout_aclk_aud", ENABLE_PCLK_AUD, 31, 0, 0),
1123 GATE(0, "aclk_smmu_aud", "dout_aclk_aud", ENABLE_ACLK_AUD, 27, 0, 0),
1124 GATE(0, "aclk_acel_lh_async_si_top", "dout_aclk_aud",
1126 GATE(ACLK_ADMA, "aclk_dmac", "dout_aclk_aud", ENABLE_ACLK_AUD, 31, 0, 0),