Lines Matching refs:reg_base
156 static void __iomem *reg_base; variable
300 pll_con = readl(reg_base + reg); in exynos4_clk_wait_for_pll()
306 pll_con = readl(reg_base + reg); in exynos4_clk_wait_for_pll()
312 samsung_clk_save(reg_base, exynos4_save_common, in exynos4_clk_suspend()
314 samsung_clk_save(reg_base, exynos4_save_pll, in exynos4_clk_suspend()
318 samsung_clk_save(reg_base, exynos4_save_soc, in exynos4_clk_suspend()
320 samsung_clk_restore(reg_base, src_mask_suspend_e4210, in exynos4_clk_suspend()
323 samsung_clk_save(reg_base, exynos4_save_soc, in exynos4_clk_suspend()
327 samsung_clk_restore(reg_base, src_mask_suspend, in exynos4_clk_suspend()
335 samsung_clk_restore(reg_base, exynos4_save_pll, in exynos4_clk_resume()
341 samsung_clk_restore(reg_base, exynos4_save_common, in exynos4_clk_resume()
345 samsung_clk_restore(reg_base, exynos4_save_soc, in exynos4_clk_resume()
348 samsung_clk_restore(reg_base, exynos4_save_soc, in exynos4_clk_resume()
1375 __raw_writel(tmp, reg_base + PWR_CTRL1); in exynos4x12_core_down_clock()
1380 __raw_writel(0x0, reg_base + E4X12_PWR_CTRL2); in exynos4x12_core_down_clock()
1390 reg_base = of_iomap(np, 0); in exynos4_clk_init()
1391 if (!reg_base) in exynos4_clk_init()
1394 ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS); in exynos4_clk_init()
1420 ARRAY_SIZE(exynos4210_plls), reg_base); in exynos4_clk_init()
1432 ARRAY_SIZE(exynos4x12_plls), reg_base); in exynos4_clk_init()