115 #define RK3066_PLL_RESET_DELAY(nr)	((nr * 500) / 24 + 1)  argument
134 	u64 nf, nr, no, rate64 = prate;  in rockchip_rk3066_pll_recalc_rate()  local
148 	nr = (pllcon >> RK3066_PLLCON0_NR_SHIFT) & RK3066_PLLCON0_NR_MASK;  in rockchip_rk3066_pll_recalc_rate()
152 	do_div(rate64, nr + 1);  in rockchip_rk3066_pll_recalc_rate()
189 		 __func__, rate->rate, rate->nr, rate->no, rate->nf);  in rockchip_rk3066_pll_set_rate()
202 	writel(HIWORD_UPDATE(rate->nr - 1, RK3066_PLLCON0_NR_MASK,  in rockchip_rk3066_pll_set_rate()
218 	udelay(RK3066_PLL_RESET_DELAY(rate->nr));  in rockchip_rk3066_pll_set_rate()
265 	unsigned int nf, nr, no, bwadj;  in rockchip_rk3066_pll_init()  local
280 	nr = ((pllcon >> RK3066_PLLCON0_NR_SHIFT) & RK3066_PLLCON0_NR_MASK) + 1;  in rockchip_rk3066_pll_init()
290 		 __func__, __clk_get_name(hw->clk), drate, rate->nr, nr,  in rockchip_rk3066_pll_init()
292 	if (rate->nr != nr || rate->no != no || rate->nf != nf  in rockchip_rk3066_pll_init()