Lines Matching refs:parent_map

49 static const struct parent_map mmcc_xo_mmpll0_mmpll1_gpll0_map[] = {
63 static const struct parent_map mmcc_xo_mmpll0_dsi_hdmi_gpll0_map[] = {
81 static const struct parent_map mmcc_xo_mmpll0_1_2_gpll0_map[] = {
97 static const struct parent_map mmcc_xo_mmpll0_1_3_gpll0_map[] = {
113 static const struct parent_map mmcc_xo_dsi_hdmi_edp_map[] = {
131 static const struct parent_map mmcc_xo_dsi_hdmi_edp_gpll0_map[] = {
149 static const struct parent_map mmcc_xo_dsibyte_hdmi_edp_gpll0_map[] = {
167 static const struct parent_map mmcc_xo_mmpll0_1_4_gpll0_map[] = {
183 static const struct parent_map mmcc_xo_mmpll0_1_4_gpll1_0_map[] = {
201 static const struct parent_map mmcc_xo_mmpll0_1_4_gpll1_0_sleep_map[] = {
326 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
350 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
374 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
393 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
406 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
419 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
432 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
462 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
475 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
503 	.parent_map = mmcc_xo_mmpll0_dsi_hdmi_gpll0_map,
516 	.parent_map = mmcc_xo_mmpll0_1_2_gpll0_map,
538 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
551 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
564 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
583 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
598 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
623 	.parent_map = mmcc_xo_mmpll0_1_3_gpll0_map,
642 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
661 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
685 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_sleep_map,
699 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_sleep_map,
727 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
741 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
755 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
769 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
788 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
801 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
814 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
837 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
855 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
869 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
888 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
907 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
927 	.parent_map = mmcc_xo_dsi_hdmi_edp_map,
945 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
958 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
976 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
995 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1013 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1031 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1049 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1072 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1094 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1113 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,