46 static DEFINE_SPINLOCK(clk_lock);
166 				ARRAY_SIZE(uart_factor_tbl), &clk_lock);  in pxa910_clk_init()
171 				apbc_base + APBC_TWSI0, 10, 0, &clk_lock);  in pxa910_clk_init()
175 				apbcp_base + APBCP_TWSI1, 10, 0, &clk_lock);  in pxa910_clk_init()
179 				apbc_base + APBC_GPIO, 10, 0, &clk_lock);  in pxa910_clk_init()
183 				apbc_base + APBC_KPC, 10, 0, &clk_lock);  in pxa910_clk_init()
187 				apbc_base + APBC_RTC, 10, 0, &clk_lock);  in pxa910_clk_init()
191 				apbc_base + APBC_PWM0, 10, 0, &clk_lock);  in pxa910_clk_init()
195 				apbc_base + APBC_PWM1, 10, 0, &clk_lock);  in pxa910_clk_init()
199 				apbc_base + APBC_PWM2, 10, 0, &clk_lock);  in pxa910_clk_init()
203 				apbc_base + APBC_PWM3, 10, 0, &clk_lock);  in pxa910_clk_init()
209 				apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
214 				apbc_base + APBC_UART0, 10, 0, &clk_lock);  in pxa910_clk_init()
220 				apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
225 				apbc_base + APBC_UART1, 10, 0, &clk_lock);  in pxa910_clk_init()
231 				apbcp_base + APBCP_UART2, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
236 				apbcp_base + APBCP_UART2, 10, 0, &clk_lock);  in pxa910_clk_init()
242 				apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
246 				apbc_base + APBC_SSP0, 10, 0, &clk_lock);  in pxa910_clk_init()
252 				apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
256 				apbc_base + APBC_SSP1, 10, 0, &clk_lock);  in pxa910_clk_init()
260 				apmu_base + APMU_DFC, 0x19b, &clk_lock);  in pxa910_clk_init()
266 				apmu_base + APMU_SDH0, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
270 				apmu_base + APMU_SDH0, 0x1b, &clk_lock);  in pxa910_clk_init()
276 				apmu_base + APMU_SDH1, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
280 				apmu_base + APMU_SDH1, 0x1b, &clk_lock);  in pxa910_clk_init()
284 				apmu_base + APMU_USB, 0x9, &clk_lock);  in pxa910_clk_init()
288 				apmu_base + APMU_USB, 0x12, &clk_lock);  in pxa910_clk_init()
294 				apmu_base + APMU_DISP0, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
298 				apmu_base + APMU_DISP0, 0x1b, &clk_lock);  in pxa910_clk_init()
304 				apmu_base + APMU_CCIC0, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
308 				apmu_base + APMU_CCIC0, 0x1b, &clk_lock);  in pxa910_clk_init()
314 				apmu_base + APMU_CCIC0, 7, 1, 0, &clk_lock);  in pxa910_clk_init()
318 				apmu_base + APMU_CCIC0, 0x24, &clk_lock);  in pxa910_clk_init()
323 				10, 5, 0, &clk_lock);  in pxa910_clk_init()
327 				apmu_base + APMU_CCIC0, 0x300, &clk_lock);  in pxa910_clk_init()