clk-hi3620.c - OpenGrok cross reference for /linux-4.1.27/drivers/clk/hisilicon/clk-hi3620.c

Lines Matching refs:__initdata
41 static const char *timer0_mux_p[] __initdata = { "osc32k", "timerclk01", };
42 static const char *timer1_mux_p[] __initdata = { "osc32k", "timerclk01", };
43 static const char *timer2_mux_p[] __initdata = { "osc32k", "timerclk23", };
44 static const char *timer3_mux_p[] __initdata = { "osc32k", "timerclk23", };
45 static const char *timer4_mux_p[] __initdata = { "osc32k", "timerclk45", };
46 static const char *timer5_mux_p[] __initdata = { "osc32k", "timerclk45", };
47 static const char *timer6_mux_p[] __initdata = { "osc32k", "timerclk67", };
48 static const char *timer7_mux_p[] __initdata = { "osc32k", "timerclk67", };
49 static const char *timer8_mux_p[] __initdata = { "osc32k", "timerclk89", };
50 static const char *timer9_mux_p[] __initdata = { "osc32k", "timerclk89", };
51 static const char *uart0_mux_p[] __initdata = { "osc26m", "pclk", };
52 static const char *uart1_mux_p[] __initdata = { "osc26m", "pclk", };
53 static const char *uart2_mux_p[] __initdata = { "osc26m", "pclk", };
54 static const char *uart3_mux_p[] __initdata = { "osc26m", "pclk", };
55 static const char *uart4_mux_p[] __initdata = { "osc26m", "pclk", };
56 static const char *spi0_mux_p[] __initdata = { "osc26m", "rclk_cfgaxi", };
57 static const char *spi1_mux_p[] __initdata = { "osc26m", "rclk_cfgaxi", };
58 static const char *spi2_mux_p[] __initdata = { "osc26m", "rclk_cfgaxi", };
60 static const char *saxi_mux_p[] __initdata = { "armpll3", "armpll2", };
61 static const char *pwm0_mux_p[] __initdata = { "osc32k", "osc26m", };
62 static const char *pwm1_mux_p[] __initdata = { "osc32k", "osc26m", };
63 static const char *sd_mux_p[] __initdata = { "armpll2", "armpll3", };
64 static const char *mmc1_mux_p[] __initdata = { "armpll2", "armpll3", };
65 static const char *mmc1_mux2_p[] __initdata = { "osc26m", "mmc1_div", };
66 static const char *g2d_mux_p[] __initdata = { "armpll2", "armpll3", };
67 static const char *venc_mux_p[] __initdata = { "armpll2", "armpll3", };
68 static const char *vdec_mux_p[] __initdata = { "armpll2", "armpll3", };
69 static const char *vpp_mux_p[] __initdata = { "armpll2", "armpll3", };
70 static const char *edc0_mux_p[] __initdata = { "armpll2", "armpll3", };
71 static const char *ldi0_mux_p[] __initdata = { "armpll2", "armpll4",
73 static const char *edc1_mux_p[] __initdata = { "armpll2", "armpll3", };
74 static const char *ldi1_mux_p[] __initdata = { "armpll2", "armpll4",
76 static const char *rclk_hsic_p[] __initdata = { "armpll3", "armpll2", };
77 static const char *mmc2_mux_p[] __initdata = { "armpll2", "armpll3", };
78 static const char *mmc3_mux_p[] __initdata = { "armpll2", "armpll3", };
82 static struct hisi_fixed_rate_clock hi3620_fixed_rate_clks[] __initdata = {
95 static struct hisi_fixed_factor_clock hi3620_fixed_factor_clks[] __initdata = {
101 static struct hisi_mux_clock hi3620_mux_clks[] __initdata = {
139 static struct hisi_divider_clock hi3620_div_clks[] __initdata = {
149 static struct hisi_gate_clock hi3620_seperated_gate_clks[] __initdata = {
271 static struct hisi_mmc_clock hi3620_mmc_clks[] __initdata = {