Lines Matching refs:divf
108 unsigned long divf, divq, vco_freq, reg; in clk_pll_recalc_rate() local
114 divf = (reg & HB_PLL_DIVF_MASK) >> HB_PLL_DIVF_SHIFT; in clk_pll_recalc_rate()
116 vco_freq = parent_rate * (divf + 1); in clk_pll_recalc_rate()
124 u32 divq, divf; in clk_pll_calc() local
138 divf = (vco_freq + (ref_freq / 2)) / ref_freq; in clk_pll_calc()
139 divf--; in clk_pll_calc()
142 *pdivf = divf; in clk_pll_calc()
148 u32 divq, divf; in clk_pll_round_rate() local
151 clk_pll_calc(rate, ref_freq, &divq, &divf); in clk_pll_round_rate()
153 return (ref_freq * (divf + 1)) / (1 << divq); in clk_pll_round_rate()
160 u32 divq, divf; in clk_pll_set_rate() local
163 clk_pll_calc(rate, parent_rate, &divq, &divf); in clk_pll_set_rate()
166 if (divf != ((reg & HB_PLL_DIVF_MASK) >> HB_PLL_DIVF_SHIFT)) { in clk_pll_set_rate()
173 reg |= (divf << HB_PLL_DIVF_SHIFT) | (divq << HB_PLL_DIVQ_SHIFT); in clk_pll_set_rate()