Lines Matching refs:clk
19 static struct clk *clk[37]; variable
21 .clks = clk,
22 .clk_num = ARRAY_SIZE(clk),
30 for (i = 0; i < ARRAY_SIZE(clk); ++i) in efm32gg_cmu_init()
31 clk[i] = ERR_PTR(-ENOENT); in efm32gg_cmu_init()
39 clk[clk_HFXO] = clk_register_fixed_rate(NULL, "HFXO", NULL, in efm32gg_cmu_init()
42 clk[clk_HFPERCLKUSART0] = clk_register_gate(NULL, "HFPERCLK.USART0", in efm32gg_cmu_init()
44 clk[clk_HFPERCLKUSART1] = clk_register_gate(NULL, "HFPERCLK.USART1", in efm32gg_cmu_init()
46 clk[clk_HFPERCLKUSART2] = clk_register_gate(NULL, "HFPERCLK.USART2", in efm32gg_cmu_init()
48 clk[clk_HFPERCLKUART0] = clk_register_gate(NULL, "HFPERCLK.UART0", in efm32gg_cmu_init()
50 clk[clk_HFPERCLKUART1] = clk_register_gate(NULL, "HFPERCLK.UART1", in efm32gg_cmu_init()
52 clk[clk_HFPERCLKTIMER0] = clk_register_gate(NULL, "HFPERCLK.TIMER0", in efm32gg_cmu_init()
54 clk[clk_HFPERCLKTIMER1] = clk_register_gate(NULL, "HFPERCLK.TIMER1", in efm32gg_cmu_init()
56 clk[clk_HFPERCLKTIMER2] = clk_register_gate(NULL, "HFPERCLK.TIMER2", in efm32gg_cmu_init()
58 clk[clk_HFPERCLKTIMER3] = clk_register_gate(NULL, "HFPERCLK.TIMER3", in efm32gg_cmu_init()
60 clk[clk_HFPERCLKACMP0] = clk_register_gate(NULL, "HFPERCLK.ACMP0", in efm32gg_cmu_init()
62 clk[clk_HFPERCLKACMP1] = clk_register_gate(NULL, "HFPERCLK.ACMP1", in efm32gg_cmu_init()
64 clk[clk_HFPERCLKI2C0] = clk_register_gate(NULL, "HFPERCLK.I2C0", in efm32gg_cmu_init()
66 clk[clk_HFPERCLKI2C1] = clk_register_gate(NULL, "HFPERCLK.I2C1", in efm32gg_cmu_init()
68 clk[clk_HFPERCLKGPIO] = clk_register_gate(NULL, "HFPERCLK.GPIO", in efm32gg_cmu_init()
70 clk[clk_HFPERCLKVCMP] = clk_register_gate(NULL, "HFPERCLK.VCMP", in efm32gg_cmu_init()
72 clk[clk_HFPERCLKPRS] = clk_register_gate(NULL, "HFPERCLK.PRS", in efm32gg_cmu_init()
74 clk[clk_HFPERCLKADC0] = clk_register_gate(NULL, "HFPERCLK.ADC0", in efm32gg_cmu_init()
76 clk[clk_HFPERCLKDAC0] = clk_register_gate(NULL, "HFPERCLK.DAC0", in efm32gg_cmu_init()