31 #define PLL_MUL(reg, layout)	(((reg) >> (layout)->mul_shift) & \  argument
32 				 (layout)->mul_mask)
34 #define PLL_MUL_MASK(layout)	((layout)->mul_mask)  argument
35 #define PLL_MUL_MAX(layout)	(PLL_MUL_MASK(layout) + 1)  argument
68 	const struct clk_pll_layout *layout;  member
86 	const struct clk_pll_layout *layout = pll->layout;  in clk_pll_prepare()  local
99 	mul = PLL_MUL(pllr, layout);  in clk_pll_prepare()
114 	pllr &= ~layout->pllr_mask;  in clk_pll_prepare()
115 	pllr |= layout->pllr_mask &  in clk_pll_prepare()
118 		((pll->mul & layout->mul_mask) << layout->mul_shift));  in clk_pll_prepare()
143 	const struct clk_pll_layout *layout = pll->layout;  in clk_pll_unprepare()  local
145 	u32 tmp = pmc_read(pmc, offset) & ~(layout->pllr_mask);  in clk_pll_unprepare()
165 	const struct clk_pll_layout *layout = pll->layout;  in clk_pll_get_best_div_mul()  local
202 	maxdiv = DIV_ROUND_UP(parent_rate * PLL_MUL_MAX(layout), rate);  in clk_pll_get_best_div_mul()
313 		      const struct clk_pll_layout *layout,  in at91_clk_register_pll()  argument
338 	pll->layout = layout;  in at91_clk_register_pll()
342 	tmp = pmc_read(pmc, offset) & layout->pllr_mask;  in at91_clk_register_pll()
344 	pll->mul = PLL_MUL(tmp, layout);  in at91_clk_register_pll()
483 		      const struct clk_pll_layout *layout)  in of_at91_clk_pll_setup()  argument
507 	clk = at91_clk_register_pll(pmc, irq, name, parent_name, id, layout,  in of_at91_clk_pll_setup()