192 void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np,  in of_at91rm9200_clk_main_osc_setup()  argument
197 	const char *name = np->name;  in of_at91rm9200_clk_main_osc_setup()
201 	of_property_read_string(np, "clock-output-names", &name);  in of_at91rm9200_clk_main_osc_setup()
202 	bypass = of_property_read_bool(np, "atmel,osc-bypass");  in of_at91rm9200_clk_main_osc_setup()
203 	parent_name = of_clk_get_parent_name(np, 0);  in of_at91rm9200_clk_main_osc_setup()
205 	irq = irq_of_parse_and_map(np, 0);  in of_at91rm9200_clk_main_osc_setup()
213 	of_clk_add_provider(np, of_clk_src_simple_get, clk);  in of_at91rm9200_clk_main_osc_setup()
340 void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np,  in of_at91sam9x5_clk_main_rc_osc_setup()  argument
347 	const char *name = np->name;  in of_at91sam9x5_clk_main_rc_osc_setup()
349 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_main_rc_osc_setup()
350 	of_property_read_u32(np, "clock-frequency", &frequency);  in of_at91sam9x5_clk_main_rc_osc_setup()
351 	of_property_read_u32(np, "clock-accuracy", &accuracy);  in of_at91sam9x5_clk_main_rc_osc_setup()
353 	irq = irq_of_parse_and_map(np, 0);  in of_at91sam9x5_clk_main_rc_osc_setup()
362 	of_clk_add_provider(np, of_clk_src_simple_get, clk);  in of_at91sam9x5_clk_main_rc_osc_setup()
462 void __init of_at91rm9200_clk_main_setup(struct device_node *np,  in of_at91rm9200_clk_main_setup()  argument
467 	const char *name = np->name;  in of_at91rm9200_clk_main_setup()
469 	parent_name = of_clk_get_parent_name(np, 0);  in of_at91rm9200_clk_main_setup()
470 	of_property_read_string(np, "clock-output-names", &name);  in of_at91rm9200_clk_main_setup()
476 	of_clk_add_provider(np, of_clk_src_simple_get, clk);  in of_at91rm9200_clk_main_setup()
607 void __init of_at91sam9x5_clk_main_setup(struct device_node *np,  in of_at91sam9x5_clk_main_setup()  argument
614 	const char *name = np->name;  in of_at91sam9x5_clk_main_setup()
617 	num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");  in of_at91sam9x5_clk_main_setup()
622 		parent_names[i] = of_clk_get_parent_name(np, i);  in of_at91sam9x5_clk_main_setup()
627 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_main_setup()
629 	irq = irq_of_parse_and_map(np, 0);  in of_at91sam9x5_clk_main_setup()
638 	of_clk_add_provider(np, of_clk_src_simple_get, clk);  in of_at91sam9x5_clk_main_setup()