Lines Matching refs:MODE
253 #define MODE 0x22 macro
2961 write_reg(info, CHB + MODE, val); in enable_auxclk()
3046 val = read_reg(info, CHA + MODE) | BIT0; in loopback_enable()
3047 write_reg(info, CHA + MODE, val); in loopback_enable()
3104 write_reg(info, CHA + MODE, val); in hdlc_mode()
3297 clear_reg_bits(info, CHA + MODE, BIT3); in rx_stop()
3314 set_reg_bits(info, CHA + MODE, BIT3); in rx_start()
3376 write_reg(info, CHA + MODE, 0); in reset_device()
3377 write_reg(info, CHB + MODE, 0); in reset_device()
3450 write_reg(info, CHA + MODE, val); in async_mode()
3574 set_reg_bits(info, CHA + MODE, BIT3); in async_mode()
3629 val = read_reg(info, CHA + MODE); in set_signals()
3641 write_reg(info, CHA + MODE, val); in set_signals()