877 	unsigned long wp = hw->config_base;  in arm_ccn_pmu_xp_watchpoint_config()  local
884 	hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__WATCHPOINT(wp);  in arm_ccn_pmu_xp_watchpoint_config()
889 			CCN_XP_DT_INTERFACE_SEL__DT_IO_SEL__SHIFT(wp));  in arm_ccn_pmu_xp_watchpoint_config()
891 			CCN_XP_DT_INTERFACE_SEL__DT_IO_SEL__SHIFT(wp);  in arm_ccn_pmu_xp_watchpoint_config()
893 			CCN_XP_DT_INTERFACE_SEL__DT_DEV_SEL__SHIFT(wp));  in arm_ccn_pmu_xp_watchpoint_config()
895 			CCN_XP_DT_INTERFACE_SEL__DT_DEV_SEL__SHIFT(wp);  in arm_ccn_pmu_xp_watchpoint_config()
897 			CCN_XP_DT_INTERFACE_SEL__DT_VC_SEL__SHIFT(wp));  in arm_ccn_pmu_xp_watchpoint_config()
899 			CCN_XP_DT_INTERFACE_SEL__DT_VC_SEL__SHIFT(wp);  in arm_ccn_pmu_xp_watchpoint_config()
903 	writel(cmp_l & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_L(wp));  in arm_ccn_pmu_xp_watchpoint_config()
905 			source->base + CCN_XP_DT_CMP_VAL_L(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()
906 	writel(cmp_h & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_H(wp));  in arm_ccn_pmu_xp_watchpoint_config()
908 			source->base + CCN_XP_DT_CMP_VAL_H(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()
911 	writel(mask_l & 0xffffffff, source->base + CCN_XP_DT_CMP_MASK_L(wp));  in arm_ccn_pmu_xp_watchpoint_config()
913 			source->base + CCN_XP_DT_CMP_MASK_L(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()
914 	writel(mask_h & 0xffffffff, source->base + CCN_XP_DT_CMP_MASK_H(wp));  in arm_ccn_pmu_xp_watchpoint_config()
916 			source->base + CCN_XP_DT_CMP_MASK_H(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()